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參數(shù)資料
| 型號： | A1351LKTTN-T |
| 廠商： | Allegro Microsystems Inc |
| 文件頁數(shù)： | 4/24頁 |
| 文件大?。?/td> | 663K |
| 描述： | IC SENSOR HALL EFFECT 4-SIP |
| 產(chǎn)品培訓(xùn)模塊： | Current Sensor |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 傳感范圍： | 0.055% ~ 0.095% DC/G |
| 類型： | 線性 - 單極，雙極 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電流 - 電源： | 10mA |
| 電流 - 輸出（最大）： | 1mA |
| 輸出類型： | 數(shù)字，推挽式 |
| 特點(diǎn)： | 高精度 |
| 工作溫度： | -40°C ~ 125°C |
| 封裝/外殼： | 4-SIP |
| 供應(yīng)商設(shè)備封裝： | 4-SIP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁面： | 1139 (CN2011-ZH PDF) |
| 其它名稱： | 620-1228-6 |
A1351
High Precision Linear Hall Effect Sensor IC
with a Push/Pull, Pulse Width Modulated Output
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Continued on the next page&
OPERATING CHARACTERISTICS valid over full operating temperature range, T
A
; C
BYPASS
= 0.1 糉, V
CC
= 5 V, unless otherwise speci ed
Characteristic
Symbol
Test Conditions
Min. Typ. Max. Units
Electrical Characteristics
Supply Voltage
V
CC
4.5 5.0 5.5 V
Supply Current
I
CC
No load on PWMOUT
6.7 10 mA
Parasitic Current
I
PAR
V
CC
= 0 V, GND = 0 V
0
mA
Power On Time
1
t
PO
T
A
= 25癈, C
L
(of test probe) = 10 pF, Sens =
0.095% D/G, C
BYPASS
= open
25 ms
Internal Bandwidth
BW
i
Small signal 3 dB, 100 G
(P-P)
magnetic input
signal, C
L
= 10 nF
150 Hz
Chopping Frequency
2
f
C
T
A
= 25癈
220 kHz
Output Characteristics
Transient Current
I
OUT(SINK)
PWMOUT to VCC
7.8 mA
I
OUT(SOURCE)
PWMOUT to GND
4.1 mA
Output Voltage Levels
V
OUT(HIGH)
I
OUT(SOURCE)
= 1 mA
4.8
V
V
OUT(LOW)
I
OUT(SINK)
= 2.5 mA
0.2 V
Rise Time
3
t
r
R
L(PULLUP)
= 2.35 k? C
L
= 14.7 nF
9.5 約
Fall Time
3
t
f
R
L(PULLUP)
= 2.35 k? C
L
= 14.7 nF
7
約
Response Time
1
t
RESPONSE
T
A
= 25癈, C
L
(of test probe) = 10 pF, Impulse
magnetic field of 420 G, Sens = 0.095% D/G
25 ms
Settling Time After Removal of Overload
Magnetic Field
1
t
SETTLE
T
A
= 25癈, Primary Overload > 5000 G
25 ms
Clamp Duty Cycles
D
CLP(HIGH)
T
A
= 25癈, B = 530 G, Sens = 0.095% D/G,
R
L(PULLDOWN)
= 10 k?/DIV>
90 92 95 % D
D
CLP(LOW)
T
A
= 25癈, B = -530 G, Sens = 0.095% D/G,
R
L(PULLUP)
= 10 k?/DIV>
5
8 10 % D
Duty Cycle Jitter
1, 4
Jitter
PWM
T
A
= 10癈 to 65癈, Sens = 0.095% D/G,
measured over 1000 output PWM clock
periods
?.05 % D
Duty Cycle Resolution
Res
PWM
T
A
= 10癈 to 65癈, Sens = 0.095% D/G,
measured over 1000 output PWM clock
periods
?.5 G
Load Resistance
R
L(PULLUP)
PWMOUT to VCC
2
k?/DIV>
R
L(PULLDWN)
PWMOUT to GND
4.8
k?/DIV>
Load Capacitance
C
L
PWMOUT to GND
14.7 nF
Pre-Programming Target
5
Pre-Programming Quiescent Duty Cycle
Output
D
(Q)PRE
B = 0 G, T
A
= 25癈
52 % D
Pre-Programming Sensitivity
Sens
PRE
T
A
= 25癈
0.045 % D/G
Pre-Programming PWM Output Carrier
Frequency
f
PWMPRE
T
A
= 25癈
170 Hz
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