參數(shù)資料
型號: 9S12DP256BDGV2
英文描述: 9S12Dx256B Device Guide. also covers C derivatives and 9S12Ax256 devices
中文描述: 9S12Dx256B設備指南。也包括C衍生物和9S12Ax256設備
文件頁數(shù): 54/126頁
文件大?。?/td> 1809K
代理商: 9S12DP256BDGV2
MC9S12DJ64 Device User Guide — V01.17
54
2.3 Detailed Signal Descriptions
2.3.1 EXTAL, XTAL — Oscillator Pins
EXTALandXTALarethecrystaldriverandexternalclockpins.Onresetallthedeviceclocksarederived
from the EXTAL input frequency. XTAL is the crystal output.
2.3.2 RESET — External Reset Pin
An active low bidirectional control signal, it acts as an input to initialize the MCU to a known start-up
state, and an output when an internal MCU function causes a reset.
2.3.3 TEST — Test Pin
This input only pin is reserved for test.
NOTE:
The TEST pin must be tied to VSS in all applications.
2.3.4 VREGEN — Voltage Regulator Enable Pin
This input only pin enables or disables the on-chip voltage regulator.
2.3.5 XFC — PLL Loop Filter Pin
PLL loop filter. Please ask your Motorola representative for the interactive application note to compute
PLL loop filter elements. Any current leakage on this pin must be avoided.
Figure 2-3 PLL Loop Filter Connections
2.3.6 BKGD / TAGHI / MODC — Background Debug, Tag High, and Mode Pin
The BKGD/TAGHI/MODC pin is used as a pseudo-open-drain pin for the background debug
communication. In MCU expanded modes of operation when instruction tagging is on, an input low on
this pin during the falling edge of E-clock tags the high half of the instruction word being read into the
MCU
XFC
R
0
C
S
C
P
VDDPLL
VDDPLL
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PDF描述
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9S12DT128DGV2 MC9S12DT128 Device User Guide V02.09
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相關代理商/技術參數(shù)
參數(shù)描述
9S12DP512DGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12Dx512 Device Guide
9S12DT128BDGV1 制造商:未知廠家 制造商全稱:未知廠家 功能描述:9S12DT128B Device Guide
9S12DT128DGV2 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MC9S12DT128 Device User Guide V02.09
9S12DT128DGV2D 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MC9S12DT128 Device User Guide V02.09
9S12DT256DGV3 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:MC9S12DT256 Device User Guide V03.03