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參數(shù)資料
| 型號(hào)： | 9S12C128DGV1 |
| 英文描述： | MC9S12C Family Device User Guide |
| 中文描述： | MC9S12C家庭設(shè)備用戶指南 |
| 文件頁數(shù)： | 87/136頁 |
| 文件大?。?/td> | 2190K |
| 代理商： | 9S12C128DGV1 |
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87
NOTE:
Insteadofspecifyingambienttemperatureallparametersarespecifiedforthemore
meaningful silicon junction temperature. For power dissipation calculations refer
to
Section A.1.8 Power Dissipation and Thermal Characteristics
.
A.1.8 Power Dissipation and Thermal Characteristics
Power dissipation and thermal characteristics are closely related. The user must assure that the maximum
operating junction temperature is not exceeded. The average chip-junction temperature (T
J
) in
°
C can be
obtained from:
The total power dissipation can be calculated from:
Two cases with internal voltage regulator enabled and disabled must be considered:
Table A-4 Operating Conditions
Rating
Symbol
Min
Typ
Max
Unit
I/O, Regulator and Analog Supply Voltage
V
DD5
2.97
5
5.5
V
Digital Logic Supply Voltage
1
NOTES
:
1. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The
operating conditions apply when this regulator is disabled and the device is powered from an external source.
Using an external regulator, with the internal voltage regulator disabled, an external LVR must be provided.
2. Some blocks e.g. ATD (conversion) and NVMs (program/erase) require higher bus frequencies for proper oper-
ation.
V
DD
2.375
2.5
2.75
V
PLL Supply Voltage
(1)
V
DDPLL
2.35
2.5
2.75
V
Voltage Difference VDDX to VDDA
VDDX
-0.1
0
0.1
V
Voltage Difference VSSX to VSSR and VSSA
VSSX
-0.1
0
0.1
V
Bus Frequency
f
bus2
0.25
-
25
MHz
Operating Junction Temperature Range
T
J
-40
-
140
°
C
TJ
TA
PD
Θ
JA
(
)
+
=
TJ
TA
PD
Θ
JA
Junction Temperature, [
°
C
]
=
Ambient Temperature, [
°
C
]
=
Total Chip Power Dissipation, [W]
=
Package Thermal Resistance, [
°
C/W]
=
PD
PINT
PIO
+
=
PINT
Chip Internal Power Dissipation, [W]
=
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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