參數(shù)資料
型號: 9S12C128DGV1
英文描述: MC9S12C Family Device User Guide
中文描述: MC9S12C家庭設(shè)備用戶指南
文件頁數(shù): 71/136頁
文件大?。?/td> 2190K
代理商: 9S12C128DGV1
71
ForalldevicesFlashPage3Fisvisibleinthe$C000-$FFFFrangeifROMONisset.Foralldevices(ecept
9S12GC16) Page 3E is also visible in the $4000-$7FFF range if ROMHM is cleared and ROMON is set.
For all devices apart from MC9S12C32 Flash Page 3D is visible in the $0000-$3FFF range if ROMON is
set...
Table 6-1 Device Specific Flash PAGE Mapping
PAGE visible with PPAGE contents
$01,$03,$05,$07,$09......$35,$37,$39,$3B,$3D,$3F
$00,$02,$04,$06,$08,$0A,$0C,$0E,$10,$12......$2C,$2E,$30,$32,$34,$36,$38,$3A,$3C,$3E
$01,$03,$05,$07,$09,$0B,$0D,$0F,$11,$13.....$2D,$2F,$31,$33,$35,$37,$39,$3B,$3D,$3F
$04,$0C,$14,$1C,$24,$2C,$34,$3C
$05,$0D,$15,$1D,$25,$2D,$35,$3D
$06,$0E,$16,$1E,$26,$2E,$36,$3E
$07,$0F,$17,$1F,$27,$2F,$37,$3F
$02,$0A,$12,$1A,$22,$2A,$32,$3A
$03,$0B,$13,$1B,$23,$2B,$33,$3B
$04,$0C,$14,$1C,$24,$2C,$34,$3C
$05,$0D,$15,$1D,$25,$2D,$35,$3D
$06,$0E,$16,$1E,$26,$2E,$36,$3E
$07,$0F,$17,$1F,$27,$2F,$37,$3F
$00,$08,$10,$18,$20,$28,$30,$38
$01,$09,$11,$19,$21,$29,$31,$39
$02,$0A,$12,$1A,$22,$2A,$32,$3A
$03,$0B,$13,$1B,$23,$2B,$33,$3B
$04,$0C,$14,$1C,$24,$2C,$34,$3C
$05,$0D,$15,$1D,$25,$2D,$35,$3D
$06,$0E,$16,$1E,$26,$2E,$36,$3E
$07,$0F,$17,$1F,$27,$2F,$37,$3F
6.1.2 BDM alternate clock
The BDM section of S12 Core User Guide reference to alternate clock is equivalent to oscillator clock.
6.1.3 Extended Address Range Emulation Implications
In order to emulate the MC9S12GC or MC9S12C-Family devices, external addressing of a 128K memory
map is required. This is provided in a 112 LQFP package version which includes the 3 necessary extra
external address bus signals via PortK[2:0]. This package version is for emulation only and not provided
as a general production package.
The reset state of DDRK is $00, configuring the pins as inputs.
The reset state of PUPKE in the PUCR register is “1” enabling the internal PortK pullups.
In this reset state the pull-ups provide a defined state and prevent a floating input, thereby preventing
unnecessary current flow at the input stage.
Device
MC9S12GC16
PAGE
3F
3E
3F
3C
3D
3E
3F
3A
3B
3C
3D
3E
3F
38
39
3A
3B
3C
3D
3E
3F
MC9S12C32
MC9S12GC32
MC9S12C64
MC9S12GC64
MC9S12C96
MC9S12GC96
MC9S12C128
MC9S12GC128
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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