參數(shù)資料
型號: 9FG1901HKLFT
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時鐘產(chǎn)生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PQCC72
封裝: ROHS COMPLIANT, PLASTIC, MLF-72
文件頁數(shù): 14/18頁
文件大?。?/td> 245K
代理商: 9FG1901HKLFT
IDTTM
Frequency Gearing Clock for CPU, PCIe Gen1 & FBD
1386A - 02/02/10
9FG1901H
Frequency Gearing Clock for CPU, PCIe Gen1 & FBD
5
Bi
t3
Bi
t2
Bi
t1
Bi
t0
200.0
266.7
320.0
333.3
400.0
00000
3
1
0.333
66.7
88.9
106.7
111.1133.3
00001
5
2
0.400
80.0
106.7
128.0
133.3
160.0
00010
12
5
0.417
83.3
111.1
133.3
138.9
166.7
00011
2
1
0.500
100.0
133.3
160.0
166.7
200.0
00100
5
3
0.600
120.0
160.0
192.0
200.0
240.0
00101
8
5
0.625
125.0
166.7
200.0
208.3
250.0
00110
3
2
0.667
133.3
177.8
213.3
222.2
266.7
00111
4
3
0.750
150.0
200.0
240.0
250.0
300.0
01000
6
5
0.833
166.7
222.2
266.7
277.8
333.3
0
1
0
1
1.000
200.0
266.7
320.0
333.3
400.0
01010
5
6
1.200
240.0
320.0
384.0
400.0
NA
01011
4
5
1.250
250.0
333.3
400.0
NA
01100
3
4
1.333
266.7
355.6
NA
01101
2
3
1.500
300.0
400.0
NA
01110
3
5
1.667
333.3
NA
01111
1
2
2.000
400.0
NA
100
133.33
160
166.67
10000
3
1
0.333
10001
5
2
0.400
NA
53.3
64.0
66.7
10010
12
5
0.417
NA
55.6
66.7
69.4
10011
2
1
0.500
50.0
66.7
80.0
83.3
10100
5
3
0.600
60.0
80.0
96.0
100.0
10101
8
5
0.625
62.5
83.3
100.0
104.2
10110
3
2
0.667
66.7
88.9
106.7
111.1
10111
5
4
0.800
80.0
106.7
128.0
133.3
11000
6
5
0.833
NA
111.1
133.3
138.9
1
0
1
1.000
100.0
133.3
160.0
166.7
11010
5
6
1.200
120.0
160.0
192.0
200.0
11011
4
5
1.250
125.0
166.7
200.0
208.3
11100
3
4
1.333
133.3
177.8
213.3
222.2
11101
2
3
1.500
150.0
200.0
11110
3
5
1.667
166.7
222.2
266.7
277.8
11111
1
2
2.000
200.0
266.7
320.0
333.3
Shaded areas are shown for reference only and device operation is not guaranteed
Output
(n)
Gear Ratio
(n/m)
SMBus
Byte 0
9FG1901 Programmable Gear Ratios
F
S
_A
_4
1
0
Input (CPU FSB) and Output
Frequencies (MHz)
Input
(m)
Note: Lines in BOLD are Power-up defaults for FS_A_410 = 0 and 1 respectively.
CLK IN (CPU FSB) Frequency (MHz)
相關(guān)PDF資料
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