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參數(shù)資料
| 型號： | 9DB423BFLF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 0.209 INCH, ROHS COMPLIANT, MO-150, SSOP-28 |
| 文件頁數(shù)： | 18/19頁 |
| 文件大?。?/td> | 199K |
| 代理商： | 9DB423BFLF |
IDT
Four Output Differential Buffer for PCIe Gen 1, Gen 2 and QPI
1437 Rev D - 05/09/11
9DB423B
Four Output Differential Buffer for PCIe for Gen 1, Gen 2 and QPI
8
Clock Periods Differential Outputs with Spread Spectrum Enabled
1 Clock
1us
0.1s
1us
1 Clock
Lg-
-SSC
-ppm error
0ppm
+ ppm error
+SSC
Lg+
Absolute
Period
Short-term
Average
Long-Term
Average
Period
Long-Term
Average
Short-term
Average
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Nominal
Maximum
DIF 100
9.949
9.999
10.024
10.025
10.026
10.051
10.101
ns
1,2,3
DIF 133
7.449
7.499
7.518
7.519
7.520
7.538
7.588
ns
1,2,4
DIF 166
5.949
5.999
6.014
6.015
6.016
6.031
6.081
ns
1,2,5
DIF 200
4.950
5.000
5.012
5.013
5.026
5.076
ns
1,2,5
DIF 266
3.700
3.750
3.759
3.760
3.769
3.819
ns
1,2,5
DIF 333
2.950
3.000
3.007
3.008
3.015
3.065
ns
1,2,5
DIF 400
2.450
2.500
2.506
2.507
2.513
2.563
ns
1,2,5
Clock Periods Differential Outputs with Spread Spectrum Disabled
1 Clock
1us
0.1s
1us
1 Clock
Lg-
-SSC
-ppm error
0ppm
+ ppm error
+SSC
Lg+
Absolute
Period
Short-term
Average
Long-Term
Average
Period
Long-Term
Average
Short-term
Average
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Minimum
Absolute
Period
Nominal
Maximum
DIF 100
9.949
9.999
10.000
10.001
10.051
ns
1,2,3
DIF 133
7.449
7.499
7.500
7.501
7.551
ns
1,2,4
DIF 166
5.949
5.999
6.000
6.001
6.051
ns
1,2,5
DIF 200
4.950
5.000
5.001
5.051
ns
1,2,5
DIF 266
3.700
3.750
3.800
ns
1,2,5
DIF 333
2.950
3.000
3.050
ns
1,2,5
DIF 400
2.450
2.500
2.550
ns
1,2,5
1Guaranteed by design and characterization, not 100% tested in production.
3 Driven by SRC output of main clock, PCIe PLL Mode or Bypass mode
4 Driven by CPU output of main clock, QPI PLL Mode or Bypass mode
5 Driven by CPU output of CK410B+/CK420BQ/CK505 main clock, Bypass mode only
S
igna
lN
a
m
e
Measurement
Window
Symbol
2 All Long Term Accuracy specifications are guaranteed with the assumption that the input clock complies with CK410B+ accuracy
requirements. The 9DB423/823 itself does not contribute to ppm error.
Notes
Definition
Measurement
Window
Units
Symbol
Definition
Units
S
igna
lN
a
m
e
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PDF描述 |
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| 9DB433AFILFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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| 9DB433AFLIFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 9DB433AGILFT | 9DB SERIES, PLL BASED CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 9DB423BFLFT | 功能描述:外圍驅(qū)動器與原件 - PCI 4 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| 9DB423BGLF | 功能描述:時鐘緩沖器 4 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB423BGLFT | 功能描述:時鐘緩沖器 4 OUTPUT PCIE GEN2 BUFFER w/QPI RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB433AFILF | 功能描述:時鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
| 9DB433AFILFT | 功能描述:時鐘緩沖器 4 OUTPUT PCIE GEN3 BUFFER RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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