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參數(shù)資料
| 型號： | 9DB306BL |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 9DB SERIES, PLL BASED CLOCK DRIVER, 6 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | 4.40 X 9.70 MM, 0.925 MM HEIGHT, TSSOP-28 |
| 文件頁數(shù)： | 15/17頁 |
| 文件大?。?/td> | 268K |
| 代理商： | 9DB306BL |
ICS9DB306BL REVISION C AUGUST 13, 2009
7
2009 Integrated Device Technology, Inc.
ICS9DB306 Data Sheet
PCI EXPRESS JITTER ATTENUATOR
APPLICATION INFORMATION
Figure 2 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
DD
/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
FIGURE 2. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT
WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
CC
= 3.3V, V_REF should be 1.25V
and R2/R1 = 0.609.
FIGURE 1. POWER SUPPLY FILTERING
V_REF
R1
1K
C1
0.1u
R2
1K
Single Ended Clock Input
CLKx
nCLKx
VCC
POWER SUPPLY FILTERING TECHNIQUES
As in any high speed analog circuitry, the power supply pins are
vulnerable to random noise. To achieve optimum jitter perfor-
mance, power supply isolation is required. The ICS9DB306 pro-
vides separate power supplies to isolate any high switching noise
from the outputs to the internal PLL. V
CC and VCCA should be indi-
vidually connected to the power supply plane through vias, and
0.01F bypass capacitors should be used for each pin.
Figure 1
illustrates this for a generic V
CC pin and also shows that VCCA
requires that an additional 24
Ω resistor along with a 10F by-
pass capacitor be connected to the V
CCA pin.
VCC
VCCA
3.3V
24
Ω
10F
.01F
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| 9DB306BLI | 制造商:Integrated Device Technology Inc 功能描述:ZERO DLY PLL CLOCK BFFR SGL 28TSSOP - Rail/Tube |
| 9DB306BLILF | 功能描述:IC JITTER ATTENUATOR 28-TSSOP 制造商:idt, integrated device technology inc 系列:- 包裝:管件 零件狀態(tài):過期 PLL:是 主要用途:PCI Express（PCIe） 輸入:HCSL，LVDS，LVHSTL，LVPECL，SSTL 輸出:LVPECL 電路數(shù):1 比率 - 輸入:輸出:1：6 差分 - 輸入:輸出:是/是 頻率 - 最大值:140MHz 電壓 - 電源:2.97 V ~ 3.63 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商器件封裝:28-TSSOP 標(biāo)準(zhǔn)包裝:50 |
| 9DB306BLILFT | 功能描述:IC JITTER ATTENUATOR 28-TSSOP 制造商:idt, integrated device technology inc 系列:- 包裝:帶卷（TR） 零件狀態(tài):過期 PLL:是 主要用途:PCI Express（PCIe） 輸入:HCSL，LVDS，LVHSTL，LVPECL，SSTL 輸出:LVPECL 電路數(shù):1 比率 - 輸入:輸出:1：6 差分 - 輸入:輸出:是/是 頻率 - 最大值:140MHz 電壓 - 電源:2.97 V ~ 3.63 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:28-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商器件封裝:28-TSSOP 標(biāo)準(zhǔn)包裝:1,000 |
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| 9DB306BLLF | 功能描述:時鐘合成器/抖動清除器 2 LVPECL Output PCI- Express Buffer RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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