參數(shù)資料
型號: 9880
廠商: Intel Corp.
英文描述: Advanced 10/100 Repeater with Intergrated Management
中文描述: 高級10/100中繼器與綜合管理
文件頁數(shù): 22/118頁
文件大?。?/td> 1648K
代理商: 9880
LXT9860/9880
Advanced 10/100 Repeater with Integrated Management
22
Datasheet
Document #: 248987
Revision#: 003
Rev Date: 08/07/01
Table 5. Inter-Repeater Backplane Signal Descriptions
Pin
Symbol
Type
1, 2
Description
Common IRB Signals
39
COMP_SEL
AI
Compatibility Mode Select.
3.3V on this pin causes the
IRCFSBP signals to operate in 3.3V only mode. 5V on this pin
causes the IR100CFSBP or IR10CFSBP signals to operate in 5V
backwards compatibility mode with legacy LXT98x and LXT91x
devices.
100 Mbps IRB Signals
36
IR100CFS
3
A I/O
OD
100 Mbps IRB Collision Force Sense.
three-level signal that
determines number of active ports on the
logical
repeater. High
level (3.3V) indicates no ports active; Mid level (approx. 1.6V)
indicates one port active; Low level (0V) indicates more than one
port active, resulting in a collision. This signal requires a 215
pull-up resistor, and connects between ICs on the same board.
37
IR100CFSBP
A I/O
OD
100 Mbps IRB Collision Force Sense - Backplane.
This three-
level signal functions the same as IR100CFS; however, it
connects between ICs with Chip ID = 00, on different boards.
IR100CFSBP requires a single 91
pull-up resistor in each stack.
This signal can be set in either 5V or 3.3V modes by the
COMP_SEL pin.
38
IR100SNGL
I/O
Schmitt
PU
100 Mbps Single Driver State.
This active Low signal is asserted
by the device with Chip ID = 00 when a packet is received from
one or more ports. Do not connect this signal between boards.
40
IR100COL
I/O
Schmitt
PU
100 Mbps Multiple Driver State.
This active Low signal is
asserted by the device with Chip ID = 00 when a packet is being
received from more than one port (collision). Do not connect this
signal between boards.
41
IR100DEN
O
OD
100 Mbps IRB Driver Enable.
This output provides directional
control for an external bidirectional transceiver (74LVT245) used
to buffer the 100 Mbps IRB in multi-board applications. It must be
pulled up by a 330
resistor. When there are multiple devices on
one board, tie all IR100DEN outputs together. If IR100DEN is tied
directly to the DIR pin on a 74LVT245, attach the on-board
IR100DAT, IR100CLK, and IR100DV signals to the
B
side of the
74LVT245, and connect the off-board signals to the
A
side of the
74LVT245.
42
IR100DV
I/O
Schmitt
OD
PU
100 Mbps IRB Data Valid.
This active Low signal indicates port
activity on the repeater. IR100DV frames the clock and data of the
packet on the backplane. This signal requires a 300
pull-up
resistor.
1. I = Input, O = Output, I/O = Input/Output, D = Digital, AI = Analog Input, A I/O = Analog Input/Output,
OD = Open Drain, OS = Open Source, PD = Pull Down, PU = Pull Up. Even if the IRB is not used, required
pull-up resistors must be installed as listed above.
NC = No Clamp. Pad does not clamp input in the absence of power.
2. Pins are 5V tolerant, unless indicated.
3. IR100CFS is
not
5V tolerant.
4. IR10CFS is
not
5V tolerant.
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