LXT9860/9880
—
Advanced 10/100 Repeater with Integrated Management
8
Datasheet
Document #: 248987
Revision#: 003
Rev Date: 08/07/01
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
Port Address Tracking Registers ........................................................................99
Search Address/Search Address Match Register.............................................100
Search Address Register Bit Assignments .......................................................100
Search Match Address Bit Assignments...........................................................100
Search Match Address Bit Definitions...............................................................100
Port Control Register Bit Assignments..............................................................101
General Port Control Registers.........................................................................101
Port Link Control and Status Register Bit Assignments....................................101
Port Link Control Register.................................................................................102
Port Learn Enable Register...............................................................................102
Port Learn Enable Register...............................................................................102
Port Status Register Bit Assignments ...............................................................103
Port Status Registers ........................................................................................103
MII Speed Status Bit Assignments....................................................................103
MII Status Bit Definitions...................................................................................103
Auto-Negotiation Registers ...............................................................................104
Auto-Negotiate Link Partner Advertisement Bit Definitions...............................104
Auto-Negotiate Expansion Bit Definitions .........................................................105
PHY Port Status Register Summary .................................................................105
PHY Port Status Register Bit Definitions...........................................................106
Auto-Negotiation Advertisement Registers .......................................................107
Auto Negotiate Advertisement Bit Definitions ...................................................107
PHY Port Control Register ................................................................................107
PHY Port Control Bit Definitions........................................................................108
Configuration Registers.....................................................................................108
Repeater Configuration Register.......................................................................109
Repeater Serial Configuration...........................................................................110
Device/Revision Register Bit Assignment.........................................................111
Global Fault LED Bit Assignments....................................................................111
..........................................................................................................................111
LED Configuration.............................................................................................112
Port LED1, 2, 3 Control Encodings ...................................................................112
LED Timer Control Register Bit Assignments ...................................................112
Repeater Reset.................................................................................................113
Software Reset..................................................................................................113
Interrupt Status/Mask Register..........................................................................113
Interrupt Status Register Bit Definitions ............................................................114
Interrupt Mask Bit Definitions ............................................................................115
Configuration Registers.....................................................................................115
Assign Addr 1....................................................................................................115
Assign Addr 2....................................................................................................116
PROM Addr 1....................................................................................................116
PROM Addr 2....................................................................................................116