參數(shù)資料
型號(hào): 97SD3248RPMH
廠商: MAXWELL TECHNOLOGIES
元件分類: DRAM
英文描述: 32M X 48 SYNCHRONOUS DRAM, 6 ns, QFP132
封裝: STACK, QFP-132
文件頁(yè)數(shù): 26/40頁(yè)
文件大?。?/td> 758K
代理商: 97SD3248RPMH
97SD3248
M
em
o
ry
32
All data sheets are subject to change without notice
2004 Maxwell Technologies
All rights reserved.
1.5Gb (8-Meg X 48-Bit X 4-Banks) SDRAM
03.25.04 Rev 1
Recharge command Interval (same bank): To stop output data
CAS Latency = 2, Burst Length = 1, 2, 4, 8
CAS Latency = 3, Burst Length = 1, 2, 4, 8
d to Precharge command interval (same bank): When the precharge command is executed for the same
bank as the write command that preceded it, the minimum interval between the two commands is 1 clock.
However, if the burst write operation is unfinished, the data must be masked by means of DQM for
assurance of the clock defined by t
DPL.
WRITE to PRECHARGE Command Interval (same bank)
Burst Length = 4 (To stop write operation)
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