
Philips Semiconductors
Product data
NE56605-42
System reset with built-in watchdog timer
2001 Aug 22
12
Parametric testing
DC and AC Characteristics can be tested using the circuits shown in
Figures 23 and 24. Associated switch and power supply settings are
shown in Table 1 and Table 2, respectively.
SL01284
4
2
V
CRT
3
1
8
V
CRT
AB C
6
5
A
7
A
S5
0.1
F
ICC
VCC
S6
S7
VCLK
VO2
CRT2
ICLK
IO2
ICT
S4
IRESET
R
1.0 M
VCT
S3
IRESET
CRT1
VO0
S1
VO1
S2
1000 pF
RESET
VS
RCT
VCC
CT
RESET
CLK
GND
IO1
A
B
C
Figure 23. Test Circuit 1 (DC parameters).
Table 1. DC characteristics Test Circuit 1 switch and power supply settings
Parameter
Symbol
S1
S2
S3
S4
S5
S6
S7
VCC
VCLK
VCT
IRESET
Read
Power supply current
ICC
B
OFF
B
OFF
ON
5.0 V
0 V
–
ICC
Reset threshold (LOW) (Note 1)
VSL
B
OFF
B
ON
5.0 to 4.0 V
3.0 V
–
VO1, CRT1
Reset threshold (HIGH) (Note 2)
VSH
B
OFF
B
ON
4.0 to 5.0 V
3.0 V
–
VO1, CRT1
Clock input threshold (Note 3)
VTH
B
OFF
B
OFF
ON
5.0 V
0 to 3.0 V
1.0V
–
ICLK
Clock input current (HIGH)
ITH
B
OFF
B
OFF
ON
5.0 V
0 V
–
ICLK
Clock input current (LOW)
ITL
B
OFF
B
OFF
ON
5.0 V
0 V
–
ICLK
Reset output voltage (HIGH)
VOH1
B
OFF
ON
B
ON
5.0 V
3.0 V
–5.0
A
–
VO1
VOH2
B
ON
OFF
C
ON
5.0 V
3.0 V
–
–5.0
A
VO2
Reset output voltage (LOW)
VOL1
B
ON
B
ON
5.0 V
3.0 V
3.0 mA
–
VO1
VOL2
B
ON
B
ON
5.0 V
3.0 V
10 mA
–
VO1
VOL3
B
OFF
C
ON
5.0 V
3.0 V
–
0.5 mA
VO2
VOL4
B
OFF
C
ON
5.0 V
3.0 V
–
1.0 mA
VO2
Reset output sink current
(N t 4)
IOL1
C
ON
OFF
B
ON
5.0 V
3.0 V
–
IO1
(Note 4)
IOL2
A
OFF
B
ON
5.0 V
3.0 V
–
IO2
CT charge current 1
ICT1
B
OFF
B
OFF
ON
5.0 V
–
1.0 V
–
ICT
CT charge current 2
ICT2
B
OFF
B
ON
OFF
ON
5.0 V
–
1.0 V
–
ICT
Minimum power supply for
RESET (Note 5)
VCCL1
B
OFF
ON
B
ON
0 to 2.0 V
0 V
–
VO1, VCC
Minimum power supply for
RESET (Note 6)
VCCL2
B
ON
OFF
A
ON
0 to 2.0 V
0 V
–
VO2, VCC
NOTES:
1. Decrease VCC from 5.0 V to 4.0 V and note the VCC value when VO1 (observed on CRT1) transitions to an abrupt LOW state.
2. Increase VCC from 4.0 V to 5.0 V and note the VCC value when VO1 (observed on CRT1) transitions to an abrupt HIGH state.
3. Increase the Clock voltage (VCLK) from 0 V to 3.0 V and observe the value of VCLK when ICLK transitions to an abrupt increase.
4. Measured with VO0 = 1.0 V.
5. Increase VCC from 0 V to 2.0 V and note the VCC value when VO1 (observed on CRT1) transitions to an abrupt LOW state. The VO1 value
will initially track the VCC voltage increase until the internal circuit bias becomes active, at which time the VO1 value will return to a LOW state.
6. Increase VCC from 0 V to 2.0 V and note the VCC value when VO2 (observed on CRT2) starts to track the VCC voltage.