參數(shù)資料
型號: 935267864118
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PDSO56
封裝: 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP-56
文件頁數(shù): 27/28頁
文件大?。?/td> 138K
代理商: 935267864118
Philips Semiconductors
Product data
PCA9504A
Glue chip 4
2002 Mar 28
8
SYMBOL
UNIT
LIMITS
TEST CONDITION
PARAMETER
SYMBOL
UNIT
TA = 0°C to +70°C
TEST CONDITION
PARAMETER
SYMBOL
UNIT
MAX
TYP
MIN
TEST CONDITION
PARAMETER
IIH
Input leakage high
VIH = 5VSB
–1
1
A
SCSI
VIH
HIGH level input voltage
0.7*5VSB
V
VIL
LOW level input voltage
0.2*5VSB
V
Hys
Input hysteresis
400
mV
IIL
Input leakage low
VIL = 0 V
–88
–26
A
IIH
Input leakage high
VIH = 5VSB
–1
1
A
FPRST
VIH
HIGH level input voltage
0.7*5VSB
V
VIL
LOW level input voltage
0.2*5VSB
V
Hys
Input hysteresis
400
mV
IIL
Input leakage low
VIL = 0 V
–88
–26
A
IIH
Input leakage high
VIH = 5VSB
–1
1
A
PWRGD_PS
VIH
HIGH level input voltage
0.7*5VSB
V
VIL
LOW level input voltage
0.2*5VSB
V
Hys
Input hysteresis
400
mV
IIL
Input leakage low
VIL = 0 V
–88
–26
A
IIH
Input leakage high
VIH = 5VSB
–1
1
A
GPO_FLUSH_CACHE/GP2_IN
VIH
HIGH level input voltage
2.2
V
VIL
LOW level input voltage
0.8
V
IL
Input leakage
VIL = 0 V
–88
–26
A
IIH
Input leakage
VIH = 5 V
–1
1
A
INIT / GP1_INA (GP Mode)
VIH
HIGH level input voltage
Part is strapped for GP
mode
2.4
V
VIL
LOW level input voltage
Part is strapped for GP
mode
0.8
V
IL
Input leakage
Part is strapped for GP
mode
–1
1
A
VCCP_Vref Bias voltage
GP mode
1.95
2.1
V
INIT / GP1_INA (Flush Mode)
VIH
HIGH level input voltage
FLUSH mode
1.5
V
VIL
LOW level input voltage
FLUSH mode
0.4
V
IIL
Input leakage
FLUSH mode
–1
1
A
VCCP_Vref Bias voltage
FLUSH mode
0.95
1.1
V
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