參數(shù)資料
型號: 935263912551
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 1 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP100
封裝: 14 X 14 MM, 1 MM HEIGHT, PLASTIC, SOT-386-1, TQFP-100
文件頁數(shù): 8/56頁
文件大?。?/td> 277K
代理商: 935263912551
Philips Semiconductors
Preliminary specification
PDI1394L21
1394 full duplex AV link layer controller
2000 Jun 06
16
12.5.1.3
Block Transmit
The block transmit format is shown below, this is the generic format for reads and writes. The first quadlet contains packet control information.
The second and third quadlets contain the 16-bit destination node ID and either the 48-bit destination offset (for requests) or the response code
and reserved data (for responses). The fourth quadlet contains the length of the data field and the extended transaction code (all zeros except
for lock transaction). The block data, if any, follows the extended transaction code.
destinationID
spd
tLabel
rt
tCode
0000
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
destinationOffsetHigh
destinationOffsetLow
dataLength
extendedTcode
Block data
padding (if needed)
SV00254
31 30
0
Figure 11. Block Packet Transmit Format
spd
tLabel
rt
tCode
0000
29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
dataLength
extendedTcode
Block data
padding (if needed)
SV00255
destinationID
rCode
31 30
0
Figure 12. Block Read or Lock Response Transmit Format
相關(guān)PDF資料
PDF描述
08-1101-00 DREHSCHALTER 1POL 12STELLUNGEN
08-1260-00 ************GESTRICHEN************
08-1341-00 DREHSCHALTER 3POL 4STELLUNGEN
08-2101-00 DREHSCHALTER 2POL 12STELLUNGEN
08-2261-00 DREHSCHALTER 4POL 6STELLUNGEN
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