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參數(shù)資料
| 型號： | 935263593118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, MO-153AC, SOT-360-1, TSSOP-20 |
| 文件頁數(shù)： | 4/20頁 |
| 文件大小： | 92K |
| 代理商： | 935263593118 |
1999 Sep 01
12
Philips Semiconductors
Product specication
Octal D-type ip-op with reset;
positive-edge trigger
74AHC273; 74AHCT273
AC WAVEFORMS
Fig.6
The clock (CP) to output (Qn) propagation delays, the clock pulse width output transition times and the
maximum clock pulse frequency.
FAMILY
VI INPUT
REQUIREMENTS
VM
INPUT
VM
OUTPUT
AHC
GND to VCC
50% VCC
AHCT
GND to 3.0 V
1.5 V
50% VCC
handbook, full pagewidth
MNA200
tPHL
tPLH
tW
1/fmax
VM
(1)
VM
(1)
CP INPUT
Qn OUTPUT
GND
VI
Fig.7
The master reset (MR) pulse width, the master reset to output (Qn) propagation delays and master reset
to clock (CP) removal time.
FAMILY
VI INPUT
REQUIREMENTS
VM
INPUT
VM
OUTPUT
AHC
GND to VCC
50% VCC
AHCT
GND to 3.0 V
1.5 V
50% VCC
handbook, full pagewidth
MNA464
MR INPUT
CP INPUT
Qn OUTPUT
tPLH
tW
trem
VM
(1)
VI
GND
VI
GND
VM
(1)
VM
(1)
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