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參數資料
| 型號： | 935208520112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 16 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-40 |
| 文件頁數： | 28/80頁 |
| 文件大?。?/td> | 446K |
| 代理商： | 935208520112 |
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1997 Dec 15
34
Philips Semiconductors
Product specication
8-bit microcontrollers
P83C524; P80C528; P83C528
13.1
I2C Interrupt Register (S1INT)
Table 15 I2C Interrupt register (address DAH) (1)
Note
1. SI bit: writing a logic 0 clears this bit, writing a logic 1 has no effect.
Table 16 Description of the S1INT bits
13.2
Single-bit Data Register with I2C Auto-clock (S1BIT)
Table 17 Single-bit Data register with I2C Auto-clock (address D9H)(1)
Note
1. Access of the S1BIT SFR clears SI, CLH, RBF and WBF. It starts the auto-clock if SCO = 0.
Table 18 Description of the S1BIT bits
76543210
SI
XXXXXXX
BIT
SYMBOL
FUNCTION
7SI
Serial Interrupt request (SI) ag: if a START condition occurs the SI ag in the S1INT
SFR is set on the falling edge of the ltered serial clock. If SI = 1 is detected during a
transfer this can be a 'spurious START' error condition. If no transfer is taking place the
SI = 1 is a START from an external master. Provided the bits EA and ES1 in IE SFR are
set, SI then generates an interrupt so that a slave address receive routine can be
started. SI can be cleared by accessing the S1BIT register or by writing '00' to S1INT.
Also after reception of a START condition, the LOW period of the clock pulse is
stretched, suspending the serial transfer to allow the software to take action. This clock
stretching is ended by a read or write access to S1BIT.
6 to 0
X = undened during read, don't care during write.
76543210
READ
SDI
0000000
WRITE
SDO
XXXXXXX
BIT
SYMBOL
FUNCTION
7
SDO/SDI
Serial Data Output (SDO) and the ltered Serial Data Input (SDI). SDI data is latched
on the rising edge of the ltered serial clock. S1BIT.7 accesses the same memory
locations as S1SCS.7. S1BIT SFR is not bit-addressable.
6 to 0
X = don't care.
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