參數(shù)資料
型號: 87L51FB
廠商: NXP Semiconductors N.V.
英文描述: CMOS single-chip 3.0V 8-bit microcontrollers
中文描述: CMOS單芯片3.0V 8位微控制器
文件頁數(shù): 4/16頁
文件大小: 187K
代理商: 87L51FB
Philips Semiconductors
Product specification
87L51FA/87L51FB
CMOS single-chip 3.0V 8-bit microcontrollers
1996 Aug 16
3-153
CERAMIC AND PLASTIC LEADED CHIP CARRIER
PIN FUNCTIONS
LCC
6
1
40
7
17
39
29
18
28
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
NC*
P1.0/T2
P1.1/T2EX
P1.2/ECI
P1.3/CEX0
P1.4/CEX1
P1.5/CEX2
P1.6/CEX3
P1.7/CEX4
RST
P3.0/RxD
NC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Function
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
V
SS
NC*
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P2.7/A15
PSEN
ALE/PROG
NC*
EA/V
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
V
CC
SU00023
* DO NOT CONNECT
PLASTIC QUAD FLAT PACK
PIN FUNCTIONS
PQFP
44
34
1
11
33
23
12
22
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Function
P1.5/CEX2
P1.6/CEX3
P1.7/CEX4
RST
P3.0/RxD
NC*
P3.1/TxD
P3.2/INT0
P3.3/INT1
P3.4/T0
P3.5/T1
P3.6/WR
P3.7/RD
XTAL2
XTAL1
Pin
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Function
V
NC*
P2.0/A8
P2.1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
PSEN
ALE/PROG
NC*
EA/V
P0.7/AD7
Pin
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Function
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
V
CC
NC*
P1.0/T2
P1.1/T2EX
P1.2/ECI
P1.3/CEX0
P1.4/CEX1
SU00024
* DO NOT CONNECT
PIN DESCRIPTIONS
PIN NUMBER
MNEMONIC
DIP
LCC
QFP
TYPE
NAME AND FUNCTION
V
SS
V
CC
P0.0–0.7
20
22
16
I
Ground:
0V reference.
40
44
38
I
Power Supply:
This is the power supply voltage for normal, idle, and power-down operation.
39–32
43–36
37–30
I/O
Port 0:
Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to
them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory. In
this application, it uses strong internal pull-ups when emitting 1s. Port 0 also outputs the
code bytes during program verification and receives code bytes during EPROM
programming. External pull-ups are required during program verification.
P1.0–P1.7
1–8
2–9
40–44,
1–3
I/O
Port 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 1 pins that are externally pulled low will source current because of the internal pull-ups.
(See DC Electrical Characteristics: I
). Port 1 also receives the low-order address byte
during program memory verification. Alternate functions include:
T2 (P1.0):
Timer/Counter 2 external count input/Clockout
T2EX (P1.1):
Timer/Counter 2 Reload/Capture/Direction Control
ECI (P1.2):
External Clock Input to the PCA
CEX0 (P1.3):
Capture/Compare External I/O for PCA module 0
CEX1 (P1.4):
Capture/Compare External I/O for PCA module 1
CEX2 (P1.5):
Capture/Compare External I/O for PCA module 2
CEX3 (P1.6):
Capture/Compare External I/O for PCA module 3
CEX4 (P1.7):
Capture/Compare External I/O for PCA module 4
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
40
41
42
43
44
1
2
3
I
I
I
I/O
I/O
I/O
I/O
I/O
P2.0–P2.7
21–28
24–31
18–25
I/O
Port 2:
Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have 1s
written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs,
port 2 pins that are externally being pulled low will source current because of the internal
pull-ups. (See DC Electrical Characteristics: I
IL
). Port 2 emits the high-order address byte
during fetches from external program memory and during accesses to external data memory
that use 16-bit addresses (MOVX @DPTR). In this application, it uses strong internal
pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses
(MOV @Ri), port 2 emits the contents of the P2 special function register. Some Port 2 pins
receive the high order address bits during EPROM programming and verification.
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