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參數資料
| 型號： | 87C554 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 8-bit microcontroller . 6 clock operation 16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, 64L LQFP |
| 中文描述： | 80C51的8位微控制器。 6小時運作16K/512檢察官辦公室/光盤/無ROM，7通道10位A / D，I2C和脈寬調制，捕捉/比較，高I / O，64L LQFP封裝 |
| 文件頁數： | 37/76頁 |
| 文件大小： | 400K |
| 代理商： | 87C554 |
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Philips Semiconductors
Preliminary specification
80C554/83C554/87C554
80C51 8-bit microcontroller – 6 clock operation
16K/512 OTP/ROM/ROMless, 7 channel 10 bit A/D, I
2
C, PWM,
capture/compare, high I/O, 64L LQFP
2000 Nov 10
37
INTERNAL BUS
8
BSD7
S1DAT
ACK
SCL
SDA
SHIFT PULSES
SU00969
Figure 38. Serial Input/Output Configuration
SHIFT IN
SDA
SCL
D7
D6
D5
D4
D3
D2
D1
D0
A
SHIFT ACK & S1DAT
ACK
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
A
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(1)
(1)
S1DAT
SHIFT BSD7
BSD7
D7
D6
D5
D4
D3
D2
D1
D0
(3)
LOADED BY THE CPU
(1) Valid data in S1DAT
(2) Shifting data in S1DAT and ACK
(3) High level on SDA
SHIFT OUT
SU00970
Figure 39. Shift-in and Shift-out Timing
In the following text, it is assumed that ENS1 = “1”.
STA
,
THE
START F
LAG
STA = “1”: When the STA bit is set to enter a master mode, the SIO1
hardware checks the status of the I2C bus and generates a START
condition if the bus is free. If the bus is not free, then SIO1 waits for
a STOP condition (which will free the bus) and generates a START
condition after a delay of a half clock period of the internal serial
clock generator.
If STA is set while SIO1 is already in a master mode and one or
more bytes are transmitted or received, SIO1 transmits a repeated
START condition. STA may be set at any time. STA may also be set
when SIO1 is an addressed slave.
STA = “0”: When the STA bit is reset, no START condition or
repeated START condition will be generated.
STO
,
THE
STOP F
LAG
STO = “1”: When the STO bit is set while SIO1 is in a master mode,
a STOP condition is transmitted to the I
2
C bus. When the STOP
condition is detected on the bus, the SIO1 hardware clears the STO
flag. In a slave mode, the STO flag may be set to recover from an
error condition. In this case, no STOP condition is transmitted to the
I
2
C bus. However, the SIO1 hardware behaves as if a STOP
condition has been received and switches to the defined “not
addressed” slave receiver mode. The STO flag is automatically
cleared by hardware.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 87C575 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K/256 OTP/ROM/ROMless, 4 comparator, failure detect circuitry, watchdog timer |
| 87C576 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 8K/256 OTP/ROM, 6 channel 10-bit A/D, 4 comparators, failure detect circuitry, watchdog timer |
| 87C58 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER |
| 87C58SBAA | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 87C58X2 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz |
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