Intel
82815EM GMCH
R
Datasheet
5
3.7.13.
3.7.14.
3.7.15.
3.7.16.
3.7.17.
3.7.18.
3.7.19.
3.7.20.
3.7.21.
3.7.22.
Graphics Device Registers (Device 2 - VISIBLE IN GFX MODE ONLY)...................... 96
3.8.1.
VID2—Vendor Identification Register (Device 2)........................................ 97
3.8.2.
DID2—Device Identification Register (Device 2)......................................... 98
3.8.3.
PCICMD2—PCI Command Register (Device 2)......................................... 98
3.8.4.
PCISTS2—PCI Status Register (Device 2)............................................... 100
3.8.5.
RID2—Revision Identification Register (Device 2).................................... 101
3.8.6.
PI—Programming Interface Register (Device 2)....................................... 101
3.8.7.
SUBC2—Sub-Class Code Register (Device 2)......................................... 101
3.8.8.
BCC2—Base Class Code Register (Device 2) ......................................... 102
3.8.9.
CLS—Cache Line Size Register (Device 2).............................................. 102
3.8.10.
MLT2—Master Latency Timer Register (Device 2)................................... 102
3.8.11.
HDR2—Header Type Register (Device 2) ................................................ 103
3.8.12.
BIST—BIST Register (Device 2)............................................................... 103
3.8.13.
GMADR-Graphics Memory Range Address Register (Device 2)............. 104
3.8.14.
MMADR—Memory Mapped Range Address Register (Device 2) ............ 105
3.8.15.
SVID—Subsystem Vendor Identification Register (Device 2).................. 105
3.8.16.
SID—Subsystem Identification Register (Device 2).................................. 106
3.8.17.
ROMADR - Video BIOS ROM Base Address Registers (Device 2).......... 106
3.8.18.
CAPPOINT—Capabilities Pointer Register (Device 2).............................. 106
3.8.19.
INTRLINE—Interrupt Line Register (Device 2) ......................................... 107
3.8.20.
INTRPIN—Interrupt Pin Register (Device 2)............................................. 107
3.8.21.
MINGNT—Minimum Grant Register (Device 2)........................................ 107
3.8.22.
MAXLAT—Maximum Latency Register (Device 2)................................... 107
3.8.23.
PM_CAPID—Power Management Capabilities ID Register (Device 2).... 108
3.8.24.
PM_CAP—Power Management Capabilities Register (Device 2) ............ 108
3.8.25.
PM_CS - Power Management Control/Status Register (Device 2)........... 109
SMLT—Secondary Master Latency Timer Register (Device 1) .................. 86
IOBASE—I/O Base Address Register (Device 1) ....................................... 87
IOLIMIT—I/O Limit Address Register (Device 1)........................................ 88
SSTS—Secondary PCI-PCI Status Register (Device 1)............................ 89
MBASE—Memory Base Address Register (Device 1)................................ 90
MLIMIT—Memory Limit Address Register (Device 1)................................. 91
PMBASE—Prefetchable Memory Base Address Register (Device 1) ........ 92
PMLIMIT—Prefetchable Memory Limit Address Register (Device 1)......... 93
BCTRL—PCI-PCI Bridge Control Register (Device 1)................................ 94
ERRCMD1—Error Command Register (Device 1) ..................................... 96
3.8.
4.
Functional Description.............................................................................................................. 111
4.1.
System Memory and I/O Address Map ....................................................................... 111
4.1.1.
Memory Address Space............................................................................ 111
4.2.
DOS Compatibility Memory Space.............................................................................. 114
4.2.1.1.
DOS Area (00000h-9FFFh).......................................................... 115
4.2.1.2.
Video Buffer Area (A0000h-BFFFFh)........................................... 115
4.2.1.3.
Monochrome Adapter (MDA) Range (B0000h - B7FFFh)............ 115
4.2.1.4.
Expansion Area (C0000h-DFFFFh).............................................. 116
4.2.1.5.
Extended System BIOS Area (E0000h-EFFFFh)......................... 116
4.2.1.6.
System BIOS Area (F0000h-FFFFFh).......................................... 116
4.3.
Extended Memory Area............................................................................................... 116
4.3.1.
Main DRAM Address Range (0010_0000h to TOM)................................. 116
4.3.1.1.
15MB-16MB Hole Area................................................................. 116
4.3.1.2.
Extended SMRAM Address Range .............................................. 116
4.3.1.3.
HSEG (High Segment)................................................................. 117
4.3.1.3.1.
TSEG (Top of Memory Segment)............................... 117
4.3.2.
PCI Memory Address Range (Top of Main Memory to 4 GB)................... 117