參數(shù)資料
型號(hào)： 82803AAMRH-R
英文描述： Controller Miscellaneous - Datasheet Reference
中文描述： 控制器雜項(xiàng)-數(shù)據(jù)表參考
文件頁(yè)數(shù)： 33/52頁(yè)
文件大?。?/td> 322K
代理商： 82803AAMRH-R
82803AA MRH-R
R
Datasheet
33
4.1.3.3.
Transactions
Reset
After power-on, the MRH-Rs and all of the RDRAMs in the memory system must be reset. This process
uses the following steps:
1. Reset the ExSIO chain that connects the MRH-Rs together.
2. Reset all MRH-Rs on the ‘expansion’ channel using serial control packets. At this point a register
read can be issued to determine if the devices connected are MRH-Rs or RDRAMs.
3. Reset SIO serial chain of all RDRAMs on channels A and B.
4.
Reset all RDRAMs on RDRAM ‘stick’ channels A and B using serial control packets.
The details of each of these steps are described below.
First, the ExSIO serial chain is reset by issuing an ExSIO reset sequence as shown in Figure 7 ExCMD is
sampled on both the rising and falling edges of ExSCK. A 1100 sequence on ExCMD resets the state
machine controlling the ExSIO pins in each MRH-R. After this reset, the ExSIO pin is configured as an
input and the MRH_SIO pin is configured as output on every MRH-R. Also, the SIO repeater bit in the
MRH-R is set to 1.
Figure 7. ExSIO Reset Sequence
ExSCK
ExCmd
At this point the RDRAM devices must be reset. This is accomplished by first broadcasting an RSIO
command to all MRH-Rs. Upon receiving this command the MRH-R will generate an SIO Reset
sequence on RDRAM ‘stick’ channels A and B. The SIO reset sequence is shown in Figure 8.
This completes the resetting of all RDRAMs.
Figure 8. RDRAM SIO Reset Sequence
2
ExSCK
ExCmd
0
3
2
1
ExSIO
4
19
RSIO
0
3
2
1
4
SCK(i)
Cmd(i)
0
3
1
4
Two rising and falling edges of SCK(i)
must occur before Cmd(i) assertion
Now, all MRH-Rs and RDRAMs are reset and ready for levelization and initialization.
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