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參數(shù)資料
| 型號(hào)： | 82596SX |
| 廠商： | Intel Corp. |
| 英文描述： | HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
| 中文描述： | 高性能的32位局域網(wǎng)協(xié)處理器 |
| 文件頁數(shù)： | 57/77頁 |
| 文件大?。?/td> | 787K |
| 代理商： | 82596SX |
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82596DX/SX
where:
EL
D When set, this bit indicates that this RFD is the last one on the RDL.
S
D When set, this bit suspends the RU after receiving the frame.
SF
D This bit selects between the Simplified or the Flexible mode.
0 D Simplified mode, all the RX data is in the RFD. RBD ADDRESS field is all
‘‘1s.’’
1 D Flexible mode. Data is in the RFD and in a linked list of Receive Buffer De-
scriptors.
C
D This bit indicates the completion of frame reception. It is set by the 82596.
B
D This bit indicates that the 82596 is currently receiving this frame, or that the 82596
is ready to receive the frame. It is initially set to 0 by the CPU. The 82596 sets it to
1 when reception set up begins, and to 0 upon completion. The C and B bits are
set during the same operation.
OK (bit 13)
D Frame received successfully, without errors. RFDs with bit 13 equal to 0 are possi-
ble only if the save bad frames configuration option is selected. Otherwise all
frames with errors will be discarded, although statistics will be collected on them.
STATUS
D The results of the Receive operation. Defined bits are,
Bit 12:
Length error if configured to check length
Bit 11:
CRC error in an aligned frame
Bit 10:
Alignment error (CRC error in misaligned frame)
Bit 9:
Ran out of buffer spaceDno resources
Bit 8:
DMA Overrun failure to acquire the system bus.
Bit 7:
Frame too short.
Bit 6:
No EOP flag (for Bit stuffing only)
Bit 5:
When the SF bit equals zero, and the 82596 is configured to save bad
frames, this bit signals that the received frame was truncated. Otherwise
it is zero.
Bits 2–4: Zeros
Bit 1:
When it is zero, the destination address of the received frame matches
the IA address. When it is 1, the destination address of the received
frame does not match the individual address. For example, a multicast
address or broadcast address will set this bit to a 1.
Bit 0:
Receive collision. A collision is detected during reception, and the colli-
sion occurred after the destination address was received.
LINK ADDRESS
D A 16-bit offset (32-bit address in the Linear mode) to the next Receive Frame
Descriptor. The Link Address of the last frame can be used to form a cyclical list.
RBD POINTER
D The offset (address in the Linear mode) of the first RBD containing the received
frame data. An RBD pointer of all ones indicates no RBD.
EOF
F
D These fields are for the Simplified and Flexible memory models. They are exactly
the same as the respective fields in the Receive Buffer Descriptor. See the next
section for detailed explanation of their functions.
SIZE
ACT COUNT
MC
D Multicast bit.
D
DESTINATION
ADDRESS
The contents of the destination address of the receive frame. The field is 0 to 6
bytes long.
SOURCE ADDRESS
D The contents of the Source Address field of the received frame. It is 0 to 6 bytes
long.
57
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 82596CA | HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR |
| 8261SHAKE22 | Alternate Action and Momentary Pushbutton Switches |
| 8261SHAKE223 | Alternate Action and Momentary Pushbutton Switches |
| 8261SHAPE22 | Alternate Action and Momentary Pushbutton Switches |
| 8261SHAPE223 | Alternate Action and Momentary Pushbutton Switches |
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參數(shù)描述 |
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| 82599_10 | 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:Transforming the data center through a reliable and unified 10GbE network |
| 82599-0010 | 制造商:OMRON INDUSTRIAL AUTOMATION 功能描述:OS32C-DK |
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