參數(shù)資料
型號(hào)： 82596SX
廠商： Intel Corp.
英文描述： HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
中文描述： 高性能的32位局域網(wǎng)協(xié)處理器
文件頁(yè)數(shù)： 34/77頁(yè)
文件大?。?/td> 787K
代理商： 82596SX
82596DX/SX
RFA Offset (Address)
In 82586 and 32-bit Segmented modes this 16-bit quantity indicates the offset portion of the address for the
Receive Frame Area. In Linear mode it is a 32-bit linear address for the Receive Frame Area. It is accessed
only if RUC equals Start.
SCB STATISTICAL COUNTERS
Statistical Counter Operation
#
The CPU is responsible for clearing all error counters before initializing the 82596. The 82596 updates
these counters by reading them, adding 1, and then writing them back to the SCB.
#
The counters are wraparound counters. After reaching FFFFFFFFh the counters wrap around to zero.
#
The 82596 updates the required counters for each frame. It is possible for more than one counter to be
updated; multiple errors will result in all affected counters being updated.
#
The 82596 executes the read-counter/increment/write-counter operation without relinquishing the bus
(locked operation). This is to ensure that no logical contention exists between the 82596 and the CPU due
to both attempting to write to the counters simultaneously. In the dual-port memory configuration the CPU
should not execute any write operation to a counter if LOCK is asserted.
#
The counters are 32-bits wide and their behavior is fully compatible with the IEEE 802.3 standard. The
82596 supports all relevant statistics (mandatory, optional, and desired) through the status of the transmit
and receive header and directly through SCB statistics.
CRCERRS
This 32-bit quantity contains the number of aligned frames discarded because of a CRC error. This counter is
updated, if needed, regardless of the RU state.
ALNERRS
This 32-bit quantity contains the number of frames that both are misaligned (i.e., where CRS deasserts on a
nonoctet boundary) and contain a CRC error. The counter is updated, if needed, regardless of the RU state.
SHRTFRM
This 32-bit quantity contains the number of received frames shorter than the minimum frame length.
The last three counters change function in monitor mode.
RSCERRS
This 32-bit quantity contains the number of good frames discarded because there were no resources to
contain them. Frames intended for a host whose RU is in the No Receive Resources state, fall into this
category. This counter is updated only if the RU is in the No Resources state. When in Moniitor mode, this
counter counts the total number of frames.
OVRNERRS
This 32-bit quantity contains the number of frames known to be lost because the local system bus was not
available. If the traffic problem lasts longer than the duration of one frame, the frames that follow the first are
lost without an indicator, and they are not counted. This counter is updated, if needed, regardless of the RU
state.
RCVCDT
This 32-bit counter contains the number of collisions detected during frame reception. This counter will only be
updated if at least 64 bytes of data are received before the collision occurs. If a collision occurs before 64
bytes of data are received, the frame is counted as a short frame. If the collisions occurs in the preamble, no
counters are incremented.
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相關(guān)PDF資料
PDF描述
82596CA HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
8261SHAKE22 Alternate Action and Momentary Pushbutton Switches
8261SHAKE223 Alternate Action and Momentary Pushbutton Switches
8261SHAPE22 Alternate Action and Momentary Pushbutton Switches
8261SHAPE223 Alternate Action and Momentary Pushbutton Switches
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