參數(shù)資料
型號(hào): 82596CA
廠商: Intel Corp.
英文描述: HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
中文描述: 高性能的32位局域網(wǎng)協(xié)處理器
文件頁數(shù): 26/77頁
文件大?。?/td> 787K
代理商: 82596CA
82596DX/SX
INTERMEDIATE SYSTEM CONFIGURATION POINTER (ISCP)
The ISCP indicates the location of the System Control Block. Often the SCP is in ROM and the ISCP is in RAM.
The CPU loads the SCB address (or an equivalent data structure) into the ISCP and asserts CA. This Channel
Attention signal causes the 82596 to begin its initialization procedure and to get the SCB address from the
ISCP and SCP. In 82586 and 32-bit Segmented modes the SCP base address is also the base address of all
Command Blocks, Frame Descriptors, and Buffer Descriptors (but not buffers). All these data structures must
reside in one 64-kB segment; however, in Linear mode no such limitation is imposed.
The following diagram illustrates the ISCP format.
ODD WORD
EVEN WORD
8 7
31
16 15
0
A15
A0
SCB OFFSET
BUSY
ISCP
A23
A0
SCB BASE ADDRESS
ISCP
a
4
u
x
x
x
x
x
x
x
x D in 82586 mode
A31ààààààààààààààààA24 D in 32-bit segmented mode
BUSY
D Indicates that the 82596 is being initialized. The CPU sets the ISCP to 01h before it gives
the first CA to the 82596. The ISCP is cleared by the 82596 after the SCB base and offset
are read. Note that the most significant byte of the first word of the ISCP is not modified
when BUSY is cleared.
SCB OFFSETD This 16-bit quantity specifies the offset portion of the address of the SCB.
SCB BASE
D Specifies the base portion of the address of the SCB. The base of SCB is also the base of
all 82596 Command Blocks, Frame Descriptors and Buffer Descriptors. In the 82586
mode, bits A31–A24 are considered to be zero.
Figure 16. The Intermediate System Configuration PointerD82586 and 32-Bit Segmented Modes
ODD WORD
EVEN WORD
8 7
31
16 15
0
0
0
0
àààààààààààààààààààààààààààààààààààààààààààààààààààààà 0
0
0
BUSY
ISCP
A31
A0
SCB ABSOLUTE ADDRESS
ISCP
a
4
BUSY
D Indicates that the 82596 is being initialized. The ISCP is set to 01h by the CPU before its
first CA to the 82596. It is cleared by the 82596 after the SCB address is read.
SCB ADDRESSD This 32-bit quantity specifies the physical address of the SCB.
Figure 17. The Intermediate System Configuration PointerDLinear Mode.
INITIALIZATION PROCESS
The CPU sets up the SCP, ISCP, and the SCB structures, and, if desired, an alternative SCP address. It also
sets BUSY to 01h. The 82596 is initialized when a Channel Attention signal follows a Reset signal, causing the
82596 to access the System Configuration Pointer. The sysbus byte, the operational mode, the bus throttle
timer triggering method, the interrupt polarity, and the state of LOCK are read. After reset the bus throttle
26
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