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參數(shù)資料
| 型號： | 82555 |
| 廠商： | INTEL CORP |
| 元件分類： | 網(wǎng)絡接口 |
| 英文描述： | 10/100 Mbps LAN physical layer interface |
| 中文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP100 |
| 封裝： | PLASTIC, MQFP-100 |
| 文件頁數(shù)： | 22/58頁 |
| 文件大?。?/td> | 863K |
| 代理商： | 82555 |
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82555 — Networking Silicon
18
Datasheet
4.5
100BASE-TX Link Integrity and Auto-Negotiation Solution
The 82555’s Auto-Negotiation function automatically configures the device to the technology,
media, and speed to operate with its link partner. Auto-Negotiation is widely described in IEEE
specification 802.3u, Clause 28. The 82555 supports 10BASE-T half duplex, 10BASE-T full
duplex, 100BASE-TX half duplex, and 100BASE-TX full duplex.
The 82555 has two Physical Medium Attachment (PMA) technologies with its link integrity
function, 10BASE-T and 100BASE-TX. The 82555 also has a special interface defined between
itself and a PHY-T4 in order to implement an Auto-Negotiation combination card.
4.5.1
Link Integrity
In 100BASE-TX, the link integrity function is determined by a stable signal status coming from the
TP-PMD block. Signal status is asserted when the PMD detects breaking squelch energy and the
right bit error rate according to the ANSI specification.
4.5.2
Auto-Negotiation
The 82555 fully supports IEEE 802.3u, Clause 28. In DTE (adapter) mode, the technology,
10BASE-T or 100BASE-TX, is determined by the Auto-Negotiation result. In repeater mode only,
this function can be disabled by pin configuration. If the T4ADV pin is active, the Auto-
Negotiation function will advertise and negotiate T4 technology.
Speed and duplex auto-select are functions of Auto-Negotiation. However, these parameters may
be manually configured via the MII management interface (MDI registers).
4.5.3
Combination Tx/T4 Auto-Negotiation Solution
The Auto-Negotiation function is available in both the 82555 and a PHY-T4. For these PHYs to
operate together, some arbitration at the PMA level is required and the Auto-Negotiation function
of one of the PHYs must be disabled. For this purpose, the 82555 is defined as the master; and the
PHY-T4, the slave. In combination mode, only the 82555’s Auto-Negotiation function is enabled
(the PHY-T4’s Auto-Negotiation is disabled).
In a combination board, a PHY-T4 is used only to support 100BASE-T4 operation and the 82555 is
sued to support 100BASE-TX full or half duplex and 10BASE-T full or half duplex as determined
by the Auto-Negotiation or Parallel Detection function.
Combination mode is available only in DTE (adapter) mode with the following pin interface:
T4ADV
(pin 54): Enables T4 technology in a PHY-TX Auto-Negotiation system.
SLVTRI
(pin 52): Disables the PHY-T4.The PHY-T4 is enabled only if the T4 technology has
been detected by Auto-Negotiation or Parallel Detection.
LISTAT (pin 6): Indicates valid link on the PHY-T4. When SLVTRI is de-asserted, the PHY-
T4 should be active.
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