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IDT JTAG Boundary Scan
Instruction Register (IR)
79RC32438 User Reference Manual
19 - 6
November 4, 2002
Notes
The Instruction register contains six shift-register-based cells that can hold instruction data. These
mandatory cells are located near the serial outputs and are the least significant bits. The values of the bits
are 0 and 1 (1 is the least significant bit). This register is decoded to perform the following functions:
–
To select test data registers that may operate while the instruction is current. The other test data
registers should not interfere with chip operation and selected data registers.
–
To define the serial test data register path used to shift data between JTAG_TDI and JTAG_TDO
during data register scanning.
The Instruction Register is comprised of 6 bits to decode instructions as follows in Table 19.2.
EXTEST
The external test (EXTEST) instruction is used to control the boundary scan register, once it has been
initialized using the SAMPLE/PRELOAD instruction. Using EXTEST, the user can then sample inputs from
or load values onto the external pins of the RC32438. Once this instruction is selected, the user then uses
the SHIFT-DR TAP controller state to shift values into the boundary scan chain. When the TAP controller
passes through the UPDATE-DR state, these values will be latched onto the output pins or into the output
enables.
Instruction
Definition
Opcode
EXTEST
Mandatory instruction allowing the testing of board level interconnections. Data is typ-
ically loaded onto the latched parallel outputs of the boundary scan shift register using
the SAMPLE/PRELOAD instruction prior to use of the EXTEST instruction. EXTEST
will then hold these values on the outputs while being executed. Also see the CLAMP
instruction for similar capability.
000000
SAMPLE/
PRELOAD
Mandatory instruction that allows data values to be loaded onto the latched parallel
output of the boundary-scan shift register prior to selection of the other boundary-
scan test instruction. The Sample instruction allows a snapshot of data flowing from
the system pins to the on-chip logic or vice versa.
000001
DEVICE_ID
Provided to select Device Identification to read out manufacturers identity, part, and
version number.
000010
HIGHZ
Tri-states all output and bidirectional boundary scan cells.
000011
RESERVED
Behaviorally equivalent to the BYPASS instruction as per the IEEE std. 1149.1 speci-
fication. However, the user is advised to use the explicit BYPASS instruction.
000100 —
100011
UNUSED
The unused instructions are behaviorally equivalent to the BYPASS instruction as per
the IEEE Std. 1149.1 specification. However, the user is advised to use the explicit
BYPASS instruction, as the internal usage of these currently unused instructions
could possibly vary in future implementations of the device.
100100 —
101100
VALIDATE
Automatically loaded into the instruction register whenever the TAP controller passes
through the CAPTURE-IR state. The lower two bits ’01’ are mandated by the IEEE
std. 1149.1 specification.
101101
UNUSED
Same as other UNUSED instructions above.
101110 —
111100
RESERVED
Behaviorally equivalent to the BYPASS instruction as per the IEEE std. 1149.1 speci-
fication. However, the user is advised to use the explicit BYPASS instruction.
111101
CLAMP
Provides JTAG user the option to bypass the part’s JTAG controller while keeping the
part outputs controlled similar to EXTEST.
111110
BYPASS
The BYPASS instruction is used to truncate the boundary scan register as a single bit
in length.
111111
Table 19.2 Instructions Supported By RC32438’s JTAG Boundary Scan