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參數(shù)資料
| 型號(hào)： | 784215AY |
| 廠商： | NEC Corp. |
| 英文描述： | MOS INTEGRATED CIRCUIT |
| 中文描述： | 馬鞍山集成電路 |
| 文件頁(yè)數(shù)： | 57/100頁(yè) |
| 文件大?。?/td> | 564K |
| 代理商： | 784215AY |
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Data Sheet U14121EJ2V0DS00
57
μ
PD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, 784218AY
www.DataSheet4U.com
8.5 Application Example of Macro Service
(1) Serial interface transmission
Each time macro service requests INTST1 and INTST2 are generated, the next transmit data is transferred
from memory to TXS1 and TXS2. When data n (last byte) has been transferred to TXS1 and TXS2 (when the
transmit data storage buffer has become empty), vectored interrupt requests INTST1 and INTST2 are
generated.
(2) Serial interface reception
Each time macro service requests INTSR1 and INTSR2 are generated, the receive data is transferred from
RXB1 and RXB2 to memory. When data n (last byte) has been transferred to memory (when the receive data
storage buffer has become full), vectored interrupt requests INTSR1 and INTSR2 are generated.
Transmit data storage buffer (memory)
Data n
Data n – 1
Data 1
Data 2
Internal bus
Transmit shift register
TXS1, TXS2 (SFR)
Transmit control
TxD1, TxD2
INTST1, INTST2
Receive data storage buffer (memory)
Data n
Data n – 1
Data 1
Data 2
Internal bus
Receive shift register
RXB1, RXB2 (SFR)
Receive control
INTSR1, INTSR2
RxD1, RxD2
Receive buffer register
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 784216A | MOS INTEGRATED CIRCUIT |
| 784216AY | MOS INTEGRATED CIRCUIT |
| 784217A | MOS INTEGRATED CIRCUIT |
| 784217AY | MOS INTEGRATED CIRCUIT |
| 784218AY | MOS INTEGRATED CIRCUIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 784216A | 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT |
| 784216AY | 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT |
| 784217A | 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT |
| 784217AY | 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT |
| 784218A | 制造商:NEC 制造商全稱:NEC 功能描述:MOS INTEGRATED CIRCUIT |
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