參數資料
型號: 75V16F64GS16
廠商: Integrated Silicon Solution, Inc.
英文描述: 64 Mbit FLASH MEMORY AND 16 Mbit PSEUDO SRAM STACKED MULTI-CHIP PACKAGE (MCP)
中文描述: 64兆位閃存和16兆位偽靜態(tài)存儲器堆疊式多芯片封裝(MCP)技術
文件頁數: 37/50頁
文件大?。?/td> 255K
代理商: 75V16F64GS16
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
PRELIMINARY INFORMATION
Rev. 00A
08/01/02
37
75V16F64GS16
ISSI
PSRAM POWER DOWN PARAMETER
Value
Parameter
Symbol
Min.
Max.
Unit
CE2r Low Setup Time for Power down Entry
t
CSP
10
ns
CE2r Low Setup Time after Power down Entry
CE
1r High Hold Time
Following CE2r
High after Power down Exit
CE
1r High Setup Time
Following CE2r
High after Power down Exit
t
C
2
LP
100
ns
t
CHH
350
μ
s
t
CHS
10
ns
PSRAM OTHER TIMING PARAMETERS
Value
Parameter
Symbol
Min.
Max.
Unit
CE
1r High to
OE
Invalid for Standby Entry
CE
1r High to
WE
Invalid for Standby Entry
(1)
CE2r Low Hold Time after Power-up
(2)
CE2r High Hold Time after Power-up
(3)
CE
1r High Hold Time
Following CE2r
High after Power-up
(2)
Input Transition Time
(4)
Notes:
1. Unintended data may be written into any address location if t
CHWX
is not satisfied.
2. Must satisfy t
CHH
(Min) after t
C2LH
(Min) .
3. Requires Power Down mode entry and exit after t
C2HL
.
4. Input Transition Time (t
T
) at AC testing is 5 ns as shown below. If actual t
T
is longer than 5 ns,
it may violate some timing parameters of AC specification.
t
CHOX
20
ns
t
CHWX
20
ns
t
C
2
LH
50
μ
s
μ
s
μ
s
t
C
2
HL
50
t
CHH
350
t
T
1
25
ns
PSRAM AC TEST CONDITIONS
Parameter
Symbol
Conditon
Value
Unit
Input HIgh Level
Input Low Level
Input Timing Measurement Level
Input Transition Time
V
IH
V
IL
V
REF
t
T
V
CC
r = 2.7V to 3.1V
V
CC
r = 2.7V to 3.1V
V
CC
r = 2.7V to 3.1V
Between V
IL
and V
IH
2.3
0.4
1.3
5
V
V
V
ns
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