參數(shù)資料
型號(hào)： 74LVC161PW,112
廠商： NXP Semiconductors
文件頁(yè)數(shù)： 3/22頁(yè)
文件大小： 0K
描述： IC SYNC 4BIT BIN COUNTER 16TSSOP
產(chǎn)品培訓(xùn)模塊： Logic Packages
標(biāo)準(zhǔn)包裝： 96
系列： 74LVC
邏輯類型： 二進(jìn)制計(jì)數(shù)器
方向： 上
元件數(shù)： 1
每個(gè)元件的位元數(shù)： 4
復(fù)位： 異步
計(jì)時(shí)： 同步
計(jì)數(shù)速率： 150MHz
觸發(fā)器類型： 正邊沿
電源電壓： 1.2 V ~ 3.6 V
工作溫度： -40°C ~ 125°C
安裝類型： 表面貼裝
封裝/外殼： 16-TSSOP（0.173"，4.40mm 寬）
供應(yīng)商設(shè)備封裝： 16-TSSOP
包裝： 管件
其它名稱： 74LVC161PW
74LVC161PW-ND
935210530112
74LVC161
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 6 — 30 September 2013
11 of 22
NXP Semiconductors
74LVC161
Presettable synchronous 4-bit binary counter; asynchronous reset
[1]
Typical values are measured at Tamb =25 C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V and 3.3 V respectively.
[2]
tpd is the same as tPLH and tPHL.
[3]
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4]
CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD VCC2 fi N+ (CL VCC2 fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
(C
L VCC
2
f
o) = sum of outputs
tsu
set-up time
Dn to CP; see Figure 12
VCC = 1.65 V to 1.95 V
5.0
-
5.0
-
ns
VCC = 2.3 V to 2.7 V
4.0
-
4.0
-
ns
VCC = 2.7 V
3.0
-
3.0
-
ns
VCC = 3.0 V to 3.6 V
2.5
1.0
-
2.5
-
ns
PE to CP; see Figure 12
VCC = 1.65 V to 1.95 V
4.5
-
4.5
-
ns
VCC = 2.3 V to 2.7 V
4.0
-
4.0
-
ns
VCC = 2.7 V
3.5
-
3.5
-
ns
VCC = 3.0 V to 3.6 V
3.0
1.2
-
3.0
-
ns
CEP, CET to CP; see Figure 13
VCC = 1.65 V to 1.95 V
8.0
-
8.0
-
ns
VCC = 2.3 V to 2.7 V
6.0
-
6.0
-
ns
VCC = 2.7 V
5.5
-
5.5
-
ns
VCC = 3.0 V to 3.6 V
5.0
2.1
-
5.0
-
ns
th
hold time
Dn, PE, CEP, CET to CP; see
VCC = 1.65 V to 1.95 V
3.0
-
3.0
-
ns
VCC = 2.3 V to 2.7 V
2.5
-
2.5
-
ns
VCC = 2.7 V
0.0
-
0.0
-
ns
VCC = 3.0 V to 3.6 V
0.5
0.0
-
0.5
-
ns
fmax
maximum
frequency
VCC = 1.65 V to 1.95 V
100
-
80
-
MHZ
VCC = 2.3 V to 2.7 V
125
-
100
-
MHZ
VCC = 2.7 V
150
-
120
-
MHz
VCC = 3.0 V to 3.6 V
150
200
-
120
-
MHz
tsk(o)
output skew time VCC = 3.0 V to 3.6 V
-
1.0
-
1.5
ns
CPD
power dissipation
capacitance
per input; VI = GND to VCC
VCC = 1.65 V to 1.95 V
-
11.1
-
pF
VCC = 2.3 V to 2.7 V
-
14.7
-
pF
VCC = 3.0 V to 3.6 V
-
17.9
-
pF
Table 7.
Dynamic characteristics …continued
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 14.
Symbol Parameter
Conditions
40 C to +85 C
40 C to +125 C Unit
Min
Typ[1]
Max
Min
Max
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