參數(shù)資料
型號: 74HC4046AD/T3
廠商: NXP SEMICONDUCTORS
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, PDSO16
封裝: SOT-109, SOP-16
文件頁數(shù): 22/34頁
文件大?。?/td> 442K
代理商: 74HC4046AD/T3
1997 Nov 25
29
Philips Semiconductors
Product specication
Phase-locked-loop with VCO
74HC/HCT4046A
Fig.30 Typical value of frequency offset as a function of C1: R1 =
∞;VVCOIN = 1/2 VCC; INH = GND; Tamb =25 °C.
To obtain optimum VCO performance, C1 must be as small as possible but larger than 100 pF.
Interpolation for various values of R2 can be easily calculated because a constant R2C1 product will produce almost the same VCO output frequency.
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