參數(shù)資料
型號: 74HC4046AD/T3
廠商: NXP SEMICONDUCTORS
元件分類: PLL合成/DDS/VCOs
英文描述: PLL FREQUENCY SYNTHESIZER, PDSO16
封裝: SOT-109, SOP-16
文件頁數(shù): 14/34頁
文件大?。?/td> 442K
代理商: 74HC4046AD/T3
1997
Nov
25
21
Philips
Semiconductors
Product
specication
Phase-locked-loop
with
VCO
74HC/HCT4046A
Fig.18 Frequency stability of the VCO as a function of ambient temperature with supply voltage as a parameter.
without offset (R2 = ∞): (a) R1 = 3 k; (b) R1 = 10 k; (c) R1 = 300 k.
with offset
(R1 =
∞): (a) R2 = 3 k; (b) R2 = 10 k; (c) R2 = 300 k.
In (b), the frequency stability for R1 = R2 = 10 k
at 5 V is also given (curve A). This curve is set by the total VCO bias current, and is
not simply the addition of the two 10 k
stability curves. C1 = 100 pF; VVCO IN = 0.5 VCC.
To obtain optimum temperature stability, C1 must be as small as possible but larger than 100 pF.
book, halfpage
MSB710
Tamb (
oC)
0
150
100
50
0
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5
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f
(%)
5 V
6 V
3 V
4.5 V
5 V
6 V
V
=
CC
3 V
(a)
handbook, halfpage
MSB711
T
( C)
amb
0
f
(%)
o
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0
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6 V
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5 V
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(b)
A
handbook, halfpage
MSB712
T
( C)
amb
0
f
(%)
o
150
100
50
0
50
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5
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6 V
(c)
V
=
CC
3 V
6 V
5 V
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