參數(shù)資料
型號(hào): 74HC193DB,118
廠商: NXP Semiconductors
文件頁(yè)數(shù): 28/30頁(yè)
文件大小: 0K
描述: IC 4BIT BINAR UP/DN COUNT 16SSOP
產(chǎn)品培訓(xùn)模塊: Logic Packages
標(biāo)準(zhǔn)包裝: 2,000
系列: 74HC
邏輯類型: 二進(jìn)制計(jì)數(shù)器
方向: 上,下
元件數(shù): 1
每個(gè)元件的位元數(shù): 4
復(fù)位: 異步
計(jì)時(shí): 同步
計(jì)數(shù)速率: 49MHz
觸發(fā)器類型: 正邊沿
電源電壓: 2 V ~ 6 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOP
包裝: 帶卷 (TR)
其它名稱: 74HC193DB-T
74HC193DB-T-ND
935188610118
74HC_HCT193
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 24 June 2013
7 of 30
NXP Semiconductors
74HC193; 74HCT193
Presettable synchronous 4-bit binary up/down counter
(1) Clear overrides load, data and count inputs.
(2) When counting up, the count down clock input (CPD) must be HIGH, when counting down the count up clock input
(CPU) must be HIGH.
Sequence
Clear (reset outputs to zero);
load (preset) to binary thirteen;
count up to fourteen, fifteen, terminal count up, zero, one and two;
count down to one, zero, terminal count down, fifteen, fourteen and thirteen.
Fig 8.
Typical clear, load and count sequence
001aag411
COUNT UP
COUNT DOWN
013
CLEAR
PRESET
1
0
15
14
13
14
15
0
1
2
MR(1)
PL
D0
D1
D2
D3
CPU(2)
CPD(2)
Q0
Q1
Q2
Q3
TCU
TCD
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