
Philips Semiconductors FAST Products
Product specification
FAST 74F807
Octal shift/count registered transceiver
with adder and parity (3–State)
June 18, 1991
8
AC WAVEFORMS
V
M
V
M
V
M
V
M
Waveform 4. Propagation delay for select to STATOUT, CI/SI/CE
to STATOUT or data to STATOUT
Waveform 5. Data setup and hold times
Waveform 6. 3–State output enable time to high level
and output disable time from high level
Waveform 7. 3-state output enable time to low level
and output disable time from low level
V
M
V
M
V
M
V
M
V
M
V
M
t
s
uL)
t
su
(H)
t
h
(L)
t
w
(L)
t
h
(H)
V
M
V
M
V
M
t
PHZ
t
PZH
V
OH
-0.3V
0V
V
M
V
M
V
M
t
PLZ
t
PZL
V
OL
+0.3V
OEB or OEA
Bn or An
An, Bn, Sn,
CI/SI/CE
STATOUT
t
PLH
t
PHL
V
M
V
M
V
M
V
M
Waveform 2. Master reset to clock recovery time
CP
t
rec
An, Sn,
CI/SI/CE
OEB or OEA
Bn or An
V
M
V
M
V
M
V
M
Waveform 3. Propagation delay for master reset to data
or master reset to STATOUT
MR
t
PHL
t
PLH
Bn or An
STATOUT
t
w
(L)
MR
CP
Waveform 1. Propagation delay for clock input to output,
clock pulse width, and maximum clock frequency
CPBA
or
CPAB
V
M
V
M
V
M
t
w
(H)
1/f
max
V
M
V
M
t
PLH
t
w
(L)
t
PHL
An or Bn
STATOUT
Notes to AC waveforms
1. For all waveforms, V
M
= 1.5V.
2. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORMS
SWITCH POSITION
TEST
SWITCH
closed
open
All other
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
2.5ns
1MHz
500ns 2.5ns
Input pulse definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test circuit for 3–State outputs
DEFINITIONS:
R
L
=
Load resistor; see AC electrical characteristics for
value.
C
L
=
Load capacitance includes jig and probe
capacitance; see AC electrical characteristics for
value
R
T
=
Termination resistance should be equal to Z
OUT
of
pulse generators.
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
amplitude
3.0V
1.5V
V
M
R
L
7.0V
t
PLZ
, t
PZL
.