參數(shù)資料
型號(hào)： 74F648A
廠商： NXP Semiconductors N.V.
英文描述： Octal transceiver/register, non-inverting(3-State)(八通道收發(fā)器/寄存器，同向（三態(tài)）)
中文描述： 八路收發(fā)器/寄存器，非反相（3態(tài)）（八通道收發(fā)器/寄存器，同向（三態(tài)））
文件頁(yè)數(shù)： 8/16頁(yè)
文件大?。?/td> 121K
代理商： 74F648A
Philips Semiconductors
Product specification
74F646/A/74F648/A
Transceivers/registers
1990 Sep 25
8
AC ELECTRICAL CHARACTERISTICS FOR 74F646
LIMITS
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
SYMBOL
PARAMETER
TEST CONDITION
UNIT
MAX
MAX
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
Maximum clock frequency
Waveform 1
100
115
90
MHz
Propagation delay
CPAB or CPBA to An or Bn
Waveform 1
5.5
5.5
7.5
8.0
10.0
10.0
5.0
5.0
11.5
11.0
ns
Propagation delay
An to Bn or Bn to An
Waveform 2
4.0
4.0
6.0
6.5
9.0
8.0
4.0
4.0
10.0
10.0
ns
Propagation delay
SAB or SBA to An or Bn
Waveform 2, 3
5.0
5.0
7.0
6.5
8.5
8.5
4.5
4.5
10.5
9.5
ns
Output enable time
OE to An or Bn
Waveform 5
Waveform 6
5.0
6.5
7.0
8.5
10.0
11.0
4.5
6.0
11.0
12.5
ns
t
PZH
t
PZL
Output enable time
DIR to An or Bn
Waveform 5
Waveform 6
4.5
6.0
6.5
8.5
9.0
11.0
4.0
5.5
10.0
12.5
ns
t
PHZ
t
PLZ
Output disable time
OE to An or Bn
Waveform 5
Waveform 6
6.5
6.5
9.0
9.0
11.5
11.5
6.0
6.0
12.5
13.5
ns
t
PHZ
t
PLZ
Output disable time
DIR to An or Bn
Waveform 5
Waveform 6
5.5
5.5
8.5
8.5
11.0
11.0
4.5
5.0
13.0
12.5
ns
AC SETUP REQUIREMENTS FOR 74F646
LIMITS
T
amb
= +25
°
C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500
MIN
TYP
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500
MIN
SYMBOL
PARAMETER
TEST CONDITION
UNIT
MAX
MAX
t
su
(H)
t
su
(L)
Setup time, high or low
An or Bn to CPAB or CPBA
Waveform 4
4.5
4.5
5.0
5.0
ns
t
h
(H
)
t
h
(
L
)
t
w
(H)
t
w
(L)
Hold time, high or low
An or Bn to CPAB or CPBA
Waveform 4
0
0
0
0
ns
Pulse width, high or low
CPAB or CPBA
Waveform 1
4.0
6.0
4.0
6.0
ns
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