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參數(shù)資料
| 型號： | 74ALVC16373MTD |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Triple 3-Input Positive-AND Gates 14-SOIC -40 to 85 |
| 中文描述： | ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 6.10 MM, MO-153, TSSOP-48 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 124K |
| 代理商： | 74ALVC16373MTD |
2005 Fairchild Semiconductor Corporation
DS500687
www.fairchildsemi.com
October 2001
Revised May 2005
7
74ALVC16373
Low Voltage 16-Bit Transparent Latch
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16373 contains sixteen non-inverting latches
with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. The flip-flops
appear to be transparent to the data when the Latch
Enable (LE) is HIGH. When LE is LOW, the data that meets
the setup time is latched. Data appears on the bus when
the Output Enable (OE) is LOW. When OE is HIGH, the
outputs are in a high impedance state.
The 74ALVC16373 is designed for low voltage (1.1V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74ALVC16373 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.1V to 3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
(I
n
to O
n
)
3.5 ns max for 3.0V to 3.6V V
CC
3.9 ns max for 2.3V to 2.7V V
CC
6.8 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Support live insertion and withdrawal (Note 1)
I
Uses patented noise/EMI reduction circuitry
I
Latchup conforms to JEDEC JED78
I
ESD performance:
Human body model
!
2000V
Machine model
!
200V
I
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2:
BGA package available in Tape and Reel only.
Note 3:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Order Number
74ALVC16373GX
(Note 2)
74ALVC16373MTD
(Note 3)
Package Number
BGA54A
(Preliminary)
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ALVC16374 | Triple 3-Input Positive-AND Gates 14-SOIC -40 to 85 |
| 74ALVC16374MTD | Triple 3-Input Positive-AND Gates 14-SOIC -40 to 85 |
| 74ALVC16374GX | Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs |
| 74ALVC16500 | Triple 3-Input Positive-AND Gates 14-PDIP -40 to 85 |
| 74ALVC16500MTDX | 18-Bit Bus Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVC16373MTD_Q | 功能描述:閉鎖 16-Bit Transparent L RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVC16373MTDX | 功能描述:閉鎖 Transparent Latch LV 16Bit 3.6V RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74ALVC16374 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs |
| 74ALVC16374/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Low-Voltage 1.8/2.5/3.3 V 16 Bit D-Type Flip-Flop |
| 74ALVC16374DGG | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit D-Type Flip-Flop |
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