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參數(shù)資料
| 型號： | 74ALVC16374GX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low Voltage 16-Bit D-Type Flip-Flop with 3.6V Tolerant Inputs and Outputs |
| 中文描述： | ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PBGA54 |
| 封裝： | 5.50 MM, PLASTIC, MO-205, FBGA-54 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 122K |
| 代理商： | 74ALVC16374GX |
2005 Fairchild Semiconductor Corporation
DS500692
www.fairchildsemi.com
October 2001
Revised May 2005
7
74ALVC16374
Low Voltage 16-Bit D-Type Flip-Flop
with 3.6V Tolerant Inputs and Outputs
General Description
The ALVC16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and output enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
The 74ALVC16374 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The 74ALVC16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.65V - 3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
t
PD
3.5 ns max for 3.0V to 3.6V V
CC
4.4 ns max for 2.3V to 2.7V V
CC
7.8 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Uses patented noise/EMI reduction circuitry
I
Latchup conforms to JEDEC JED78
I
ESD performance:
Human body model
!
2000V
Machine model
!
200V
I
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Note 2:
BGA package available in Tape and Reel only.
Note 3:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Order Number
74ALVC16374GX
(Note 2)
74ALVC16374MTD
(Note 3)
Package Number
BGA54A
Package Descriptions
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
MTD48
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 74ALVC16500 | Triple 3-Input Positive-AND Gates 14-PDIP -40 to 85 |
| 74ALVC16500MTDX | 18-Bit Bus Transceiver |
| 74ALVC16500MTD | Triple 3-Input Positive-AND Gates 14-SO -40 to 85 |
| 74ALVC16501 | Triple 3-Input Positive-AND Gates 14-SO -40 to 85 |
| 74ALVC16501MTDX | 18-Bit Bus Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVC16374MTD | 功能描述:觸發(fā)器 16-Bit D-Type Flip-F RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ALVC16374MTD_Q | 功能描述:觸發(fā)器 16-Bit D-Type Flip-F RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ALVC16374MTDX | 功能描述:觸發(fā)器 D-Type Flip Flop LV 16Bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| 74ALVC1637DTR | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:ON Semiconductor 功能描述: |
| 74ALVC164245 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Integrated Device Technology Inc 功能描述: |
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