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參數(shù)資料
| 型號： | 74ALVC162827TX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 10-Bit Buffer/Driver |
| 中文描述： | ALVC/VCX/A SERIES, DUAL 10-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | 6.10 MM, MO-153, TSSOP-56 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 77K |
| 代理商： | 74ALVC162827TX |
2001 Fairchild Semiconductor Corporation
DS500698
www.fairchildsemi.com
November 2001
Revised November 2001
7
R
74ALVC162827
Low Voltage 20-Bit Buffer/Line Driver
with 3.6V Tolerant Inputs and Outputs
and 26
Series Resistors in the Outputs
General Description
The ALVC162827 contains twenty non-inverting buffers
with 3-STATE outputs to be employed as a memory and
address driver, clock driver, or bus oriented transmitter/
receiver. The device is byte controlled. Each byte has NOR
output enables for maximum control flexibility.
The 74ALVC162827 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O capability up to 3.6V. The
ALVC162827 is also designed with 26
resistors in the
outputs.
The 74ALVC162827 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
1.65V to 3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
26
series resistors in outputs
I
t
PD
3.9 ns max for 3.0V to 3.6V V
CC
4.6 ns max for 2.3V to 2.7V V
CC
8.2 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Uses patented noise/EMI reduction circuitry
I
Latchup conforms to JEDEC JED78
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor; the minimum
value of the resistor is determined by the current-sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix “X” to the ordering code.
Logic Symbol
Pin Descriptions
Order Number
74ALVC162827T
Package Number
MTD56
Package Description
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
n
I
0
–
I
19
O
0
–
O
19
Output Enable Input (Active LOW)
Inputs
Outputs
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74ALVC162830ABDF | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 74ALVC162831DBBRE4 | 功能描述:寄存器 1-Bit to 4-Bit Add Reg/Drvr W/3-St Otpt RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74ALVC162831DBBRG4 | 功能描述:寄存器 1 to 4B Address Register RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時鐘頻率:36 MHz 傳播延遲時間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube |
| 74ALVC162834A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit registered driver with inverted register enable and 30ohm termination resistors 3-State |
| 74ALVC162834A_0006 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:18-bit registered driver with inverted register enable and 30ohm termination resistors 3-State |
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