參數(shù)資料
型號(hào): 74ALVC162838TX
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: 通用總線功能
英文描述: BUFFER/FLIP-FLOP|AVC/ALVC-CMOS|TSSOP|48PIN|PLASTIC
中文描述: ALVC/VCX/A SERIES, 16-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, MO-153, TSSOP-48
文件頁(yè)數(shù): 1/6頁(yè)
文件大?。?/td> 88K
代理商: 74ALVC162838TX
2001 Fairchild Semiconductor Corporation
DS500711
www.fairchildsemi.com
November 2001
Revised November 2001
7
R
74ALVC162838
Low Voltage 16-Bit Selectable Register/Buffer
with 3.6V Tolerant Inputs/Outputs
and 26
Series Resistors in the Outputs
General Description
The ALVC162838 contains sixteen non-inverting selectable
buffered or registered paths. The device can be configured
to operate in a registered, or flow through buffer mode by
utilizing the register enable (REGE) and Clock (CLK) sig-
nals. The device operates in a 16-bit word wide mode. All
outputs can be placed into 3-State through the use of the
OE pin. These devices are ideally suited for buffered or
registered 168 pin and 200 pin SDRAM DIMM memory
modules.
The 74ALVC162838 is designed for low voltage (1.65V to
3.6V) V
CC
applications with I/O compatibility up to 3.6V.
The ALVC162838 is also designed with 26
series resis-
tors in the outputs. This design reduces line noise in appli-
cations such as memory address drivers, clock drivers, and
bus transceivers/transmitters.
The 74ALVC162838 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
I
Compatible with PC100 and PC133 DIMM module
specifications
I
1.65V–3.6V V
CC
supply operation
I
3.6V tolerant inputs and outputs
I
26
series resistors in the outputs
I
t
PD
(CLK to O
n
)
4.4 ns max for 3.0V to 3.6V V
CC
5.9 ns max for 2.3V to 2.7V V
CC
9.8 ns max for 1.65V to 1.95V V
CC
I
Power-off high impedance inputs and outputs
I
Supports live insertion and withdrawal (Note 1)
I
Uses patented noise/EMI reduction circuitry
I
Latchup conforms to JEDEC JED78
I
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or power
down, OE should be tied to V
CC
through a pull-up resistor. The minimum
value of the resistor is determined by the current -sourcing capability of the
driver.
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter
X
to the ordering code.
Logic Symbol
Pin Descriptions
Ordering Code
74ALVC162838T
Package Number
MTD48
Package Descriptions
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Description
OE
Output Enable Input (Active LOW)
I
0
I
15
O
0
O
15
CLK
Inputs
Outputs
Clock Input
REGE
Register Enable Input
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參數(shù)描述
74ALVC162839 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 20-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs/Outputs and 26з Series Resistors in the Outputs
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74ALVC162839T_Q 功能描述:寄存器 20-Bit Selectable Re RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
74ALVC162839TX 功能描述:寄存器 Register/Buffer LV 20Bit Selectable RoHS:否 制造商:NXP Semiconductors 邏輯類型:CMOS 邏輯系列:HC 電路數(shù)量:1 最大時(shí)鐘頻率:36 MHz 傳播延遲時(shí)間: 高電平輸出電流:- 7.8 mA 低電平輸出電流:7.8 mA 電源電壓-最大:6 V 最大工作溫度:+ 125 C 封裝 / 箱體:SOT-38 封裝:Tube
74ALVC163245 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Low Voltage 16-Bit Dual Supply Translating Transceiver with 3-STATE Outputs