參數(shù)資料
型號: 74ABT16899
廠商: NXP Semiconductors N.V.
英文描述: 18-bit latched transceiver with 16-bit parity generator/checker 3-State
中文描述: 18位鎖存器,16位奇偶發(fā)生器/檢查三態(tài)
文件頁數(shù): 13/16頁
文件大小: 105K
代理商: 74ABT16899
Philips Semiconductors
Product specification
74ABT16899
74ABTH16899
18-bit latched transceiver with 16-bit
parity generator/checker (3-State)
1998 Feb 25
13
OEA,
OEB
V
M
t
PZH
t
PHZ
0V
V
OH
–0.3V
V
M
V
M
An, APAR,
Bn, BPAR
SA00303
Waveform 11. 3-State Output Enable Time to High Level and Output Disable Time from High Level
OEA,
OEB
t
PZL
t
PLZ
V
OL
+0.3V
An, APAR,
Bn, BPAR
V
M
V
M
V
M
SA00304
Waveform 12. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level
TEST CIRCUIT AND WAVEFORM
t
W
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
W
AMP (V)
0V
0V
t
THL (
t
f
)
INPUT PULSE REQUIREMENTS
Rep. Rate
t
w
t
R
t
F
1MHz
500ns
2.5ns
2.5ns
Input Pulse Definition
V
CC
FAMILY
74ABT/H16
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Open Collector Outputs
t
THL (
t
f
)
t
TLH (
t
r
)
t
TLH (
t
r
)
AMP (V)
Amplitude
3.0V
R
X
SH00009
TEST
t
PLZ
t
PZL
All other
SWITCH
closed
closed
open
SWITCH POSITION
R
L
=
C
L
=
Load resistor; see AC CHARACTERISTICS for value.
Load capacitance includes jig and probe capacitance;
see AC CHARACTERISTICS for value.
Termination resistance should be equal to Z
OUT
of
pulse generators.
R
T
=
DEFINITIONS:
V
X
OUTPUT R
X
V
X
ERROR 100 V
CC
All other 500 7.0V
LOAD VALUES
相關(guān)PDF資料
PDF描述
74ABTH16899 18-bit latched transceiver with 16-bit parity generator/checker (3-State)(帶16位奇偶發(fā)生器/校驗器的18位鎖存收發(fā)器(三態(tài)))
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