參數(shù)資料
型號: 71M6515H-IGTR/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封裝: LEAD FREE, LQFP-64
文件頁數(shù): 9/60頁
文件大?。?/td> 826K
代理商: 71M6515H-IGTR/F
71M6515H
Energy Meter IC
DATA SHEET
JULY 2011
Page: 17 of 60
2005
2011 Teridian Semiconductor Corporation
1.6
A Maxim Integrated Products Brand
The minimum combined cycle time for CE and post-processor is 400ms, which makes the maximum frequency for the IRQZ
signal 2.5Hz.
If the 71M6515H is interfacing to an external DSP (typically, but not necessarily through the SSI interface), the host may turn
off post-processing by setting the CE_ONLY bit in the CONFIG word. This will permit setting SUM_CYCLES below its
recommended lower limit of 24. SUM_CYCLES may then be reduced to 1, creating an accumulation interval of only 42 samples.
The outputs available in CE only mode are limited to temperature, frequency, voltage phases, input signal zero crossings, plus
WSUM and VARSUM for each phase and VSQSUM, ISQSUM, and ISQFRACT for each phase.
Pulse Generators
The chip contains four pulse generators connected to the pins PULSEW, PULSER, PULSE3, and PULSE4 that create low
jitter pulses from 32-bit data. The peak time jitter for PULSEW and PULSER is the 397s MUX frame period, and is
independent of the rate of the generator or the length of time the generator is monitored. Thus, if the pulse generator is
monitored for 1 second, the peak jitter is 400PPM. After 10 seconds, the peak jitter is 40PPM.
PULSE3 and PULSE4 are updated at a slower rate and have four times higher jitter, i.e. 160PPM after 10 seconds.
The average jitter is always zero. If it is attempted to drive either pulse generator faster than its maximum rate, it will simply
output at its maximum rate without exhibiting any roll-over characteristics.
Pulse generator inputs may be from three sources:
Internal (directly from the CE), PULSEW and PULSER only
External (controlled by the host writing to registers APULSEW, APULSER, APULSE3, APULSE4)
Post-processed values
The source is selected individually for each pulse output with the PULSEW_SRC, PULSER_SRC, PULSE3_SRC, and PULSE4_SRC
registers. Figure 7 shows internal pulse generation for the PULSEW output selected by writing the value 35 into the
PULSEW_SRC register.
PULSEW_SRC
35: WSUM
0: WSUM
1: WASUM
2: WBSUM
3: WCSUM
4: VARSUM
34: VAR2SUM_E
36: APULSEW
HOST
CE
PULSEW
OUTPUT
PO
ST
PR
O
C
ESSO
R
35
34: VAR2SUM_E
Figure 7: Internal Pulse Generation Selected in the PULSEW_SRC Register
相關(guān)PDF資料
PDF描述
71M6515H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP64
7234 SPECIALTY ANALOG CIRCUIT, CDIP22
7244 SPECIALTY ANALOG CIRCUIT, PDIP20
7250 SPECIALTY ANALOG CIRCUIT, PDIP16
73S8009CN-32IMR/F SPECIALTY ANALOG CIRCUIT, QCC32
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
71M6515H-IGTW/F 功能描述:計量片上系統(tǒng) - SoC Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數(shù)量:12 片上 ADC: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel
71M6515H-IGTW1 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Up to 10ppmC precision ultra-stable voltage reference Digital temperature compensation
71M6515H-IGTWR1 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Up to 10ppmC precision ultra-stable voltage reference Digital temperature compensation
71M6521BE 制造商:TERIDIAN 制造商全稱:TERIDIAN 功能描述:Energy Meter IC
71M6521BE-DB 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 71M6521BE Demo Brd