參數(shù)資料
型號: 71M6515H-IGTR/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號調理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封裝: LEAD FREE, LQFP-64
文件頁數(shù): 11/60頁
文件大小: 826K
代理商: 71M6515H-IGTR/F
71M6515H
Energy Meter IC
DATA SHEET
JULY 2011
Page: 19 of 60
2005
2011 Teridian Semiconductor Corporation
1.6
A Maxim Integrated Products Brand
The pin PULSE_INIT determines the logic level applied to the pulse pins on power-up, i.e. with PULSE_INIT low, the pulse
pins will be initialized to low (default = 1).
The pulse width PW is controlled with the PULSEWIDTH register for the PULSER and PULSEW output pins per the following
formula:
6
.
2520
1
2
+
=
PULSEWIDTH
P
W
The PULSE3 and PULSE4 output pins will always generate pulses with 50% duty cycle.
Figure 8: Pulse Generator Timing
Accumulation 1
Accumulation 2
Accumulation 3
Post 1
Post 0
Post 2
READY
APULSE write
CE Operations
Post Processing
Pulse -1
Pulse 0
Pulse 1
Pulse Generator
READY
XFER
Accumulation Interval
Post-Processed Data
APULSE write
Accumulation 1
Accumulation 2
Accumulation 3
Post 1
Post 0
Post 2
READY
CE Operations
Post Processing
Pulse 0
Pulse 1
Pulse 2
Pulse Generator
READY
XFER
Accumulation Interval
Internal Data (Directly by CE)
Accumulation 1
Accumulation 2
Accumulation 3
Post 1
Post 0
Post 2
Host 0
READY
CE Operations
Post Processing
Host Processing
Pulse -2
Pulse -1
Pulse 0
Pulse Generator
Host 1
READY
Host 2
READY
XFER
Accumulation Interval
External (Host data is transferred to the pulse generator in the first accumulation interval after the
next READY)
APULSE write
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