參數(shù)資料
型號(hào): 71M6515H-IGTR/F
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封裝: LEAD FREE, LQFP-64
文件頁數(shù): 10/60頁
文件大?。?/td> 826K
代理商: 71M6515H-IGTR/F
71M6515H
Energy Meter IC
DATA SHEET
JULY 2011
Page: 18 of 60
2005
2011 Teridian Semiconductor Corporation
1.6
A Maxim Integrated Products Brand
Internal data is pulsed out during the accumulation interval immediately following its accumulation interval. Post-processed
values are pulsed out one accumulation interval after that.
The pulse generator output rate depends on its input value, WRATE, PULSE_SLOW, and PULSE_FAST. Additionally, its
maximum pulse width (negative going pulse) is controlled by PULSEWIDTH. High frequency pulses will have 50% duty cycle
until their rate slows enough that their pulse width is limited by PULSEWIDTH.
In internal and post-processed modes, the pulse rate, expressed as Kh (Wh per pulse) is given by the formula:
Pulse
Wh
X
WRATE
CYCLES
SUM
In
IMAX
VMAX
Kh
/
5757
.
1
_
8
_
=
where
VMAX is the meter voltage corresponding to an input voltage of 176mV (rms) at the VA, VB, and VC input pins ,
IMAX is the meter current corresponding to an input voltage of 176mV (rms) at the IA, IB, and IC input pins,
In_8 is the additional ADC gain (1 or 8), as controlled by the IA_X, IB_X and IC_X bits in the CONFIG register.
X is the pulse speed factor determined from Table 3.
PULSE_SLOW
PULSE_FAST
X
0
1.5*2
2=6
0
1
1.5*2
6=96
1
0
1.5*2
-4=0.09375
1 (default)
1.5
Table 3: Pulse Speed Factor X
In external pulse mode, the pulse rate is given by the formula:
Rate(Hz) = WRATE * X * input * 35.82*10
-12,
where input is the value in registers APULSER, APULSEW. APULSE3 or APULSE4,
X is the pulse speed factor determined from Table 3.
External pulse generation can be seen as providing the raw voltage and current readings equivalent to Vin*Iin / LSB directly to
the pulse generator.
The maximum pulse rate is 7.56kHz for PULSEW and PULSER, and 150Hz for PULSE3 and PULSE4.
In external pulse mode, the pulse generators load their data at the beginning of each CE accumulation interval, preserving any
partially implemented pulses from the previous interval. The source of data is controlled by the entries in the PULSE_SRCS
register. PULSER_SRCS contains 8-bit entries for each pulse source, PULSEW, PULSER, PULSE3, and PULSE4. See the
register description for details.
The procedure for accurate external pulse generation controlled by the host is:
1)
Respond to a READY interrupt by reading the accumulated values.
2)
Process the accumulated values.
3)
Write the processed value(s) to APULSER, APULSEW, APULSE3, or APULSE4. The host must write to APULSER,
APULSEW, APULSE3, and APULSE4 before the next READY interrupt for the pulse generation to be beginning in the
following accumulation interval.
Figure 8 illustrates pulse generator timing.
Regardless of the source, the pulse generators should receive new data during each accumulation interval. If this does not
occur and if the corresponding bit in the STMASK register is set, an APULSE_ERR interrupt will be issued.
The PULSEW, PULSER, PULSE3 and PULSE4 pins are suitable for driving LEDs through a current limiting resistor. The LED
should be connected so it is on when the pulse pin is low.
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