參數(shù)資料
型號： 71M6513-IGTR/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 模擬信號調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP100
封裝： LEAD FREE, LQFP-100
文件頁數(shù)： 11/104頁
文件大?。?/td> 1390K
代理商： 71M6513-IGTR/F
71M6513/71M6513H
3-Phase Energy Meter IC
DATA SHEET
AUGUST 2011
Page: 14 of 104
2005-2011 Teridian Semiconductor Corporation
A Maxim Integrated Products Brand
Figure 4: Samples in Multiplexer Cycle
The end of each multiplexer cycle is signaled to the MPU by the CE_BUSY interrupt. At the end of each multiplexer cycle,
status information, such as sag data and the digitized input signal, is available to the MPU.
Figure 5: Accumulation Interval
Figure 5 shows the accumulation interval resulting from PRE_SAMPS = 42 and SUM_CYCLES = 50, consisting of 2100 samples
of 397s each (only one phase is shown) followed by the XFER_BUSY interrupt. The sampling in this example is applied to a
50Hz signal.
There is no correlation between the line signal frequency and the choice of PRE_SAMPS or SUM_CYCLES (even though when
SUM_CYCLES = 42 one set of SUM_CYCLES happens to sample a period of 16.6ms). Furthermore, sampling does not have to
start when the line voltage crosses the zero line.
Delay Compensation
When measuring the energy of a phase (i.e., Wh and VARh) in a service, the voltage and current for that phase must be
sampled at the same instant. Otherwi
se, the phase difference, Ф, introduces errors.
VA
VB
IB
VC
IC
IA
1/2520.6Hz = 397s
2/32768Hz =
61.04s
13/32768Hz = 397s
per mux cycle
A
C
B
VA
VB
IB
VC
IC
IA
1/2520.6Hz = 397s
2/32768Hz =
61.04s
13/32768Hz = 397s
per mux cycle
A
C
B
XFER_BUSY
Interrupt to MPU
20ms
833ms
XFER_BUSY
Interrupt to MPU
20ms
833ms
相關(guān)PDF資料
PDF描述
71M6513H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
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