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參數(shù)資料
| 型號： | 70V18L15PF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 64K X 9 DUAL-PORT SRAM, 15 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁數(shù)： | 12/17頁 |
| 文件大?。?/td> | 157K |
| 代理商： | 70V18L15PF8 |
IDT70V18L
High-Speed 3.3V 64K x 9 Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
4
Truth Table III – Semaphore Read/Write Control(1)
Truth Table I – Chip Enable(1,2)
NOTES:
1.
Chip Enable references are shown above with the actual
CE0 and CE1 levels; CE is a reference only.
2.
'H' = VIH and 'L' = VIL.
3.
CMOS standby requires 'X' to be either < 0.2V or >VCC-0.2V.
Truth Table II – Non-Contention Read/Write Control
NOTES:
1.
A0L — A15L
≠ A0R — A15R
2.
Refer to Chip Enable Truth Table.
NOTES:
1. There are eight semaphore flags written to I/O0 and read from all the I/Os (I/O0-I/O8). These eight semaphore flags are addressed by A0-A2.
2.
Refer to Chip Enable Truth Table.
CE
CE0
CE1
Mode
L
VIL
VIH
Port Selected (TTL Active)
< 0.2V
>VCC -0.2V
Port Selected (CMOS Active)
H
VIH
X
Port Deselected (TTL Inactive)
XVIL
Port Deselected (TTL Inactive)
>VCC -0.2V
X
(3)
Port Deselected (CMOS Inactive)
X(3)
<0.2V
Port Deselected (CMOS Inactive)
4854 tbl 06
Inputs
(1)
Outputs
Mode
CE(2)
R/
W
OE
SEM
I/O0-8
H
X
H
High-Z
Deselected: Power-Down
LL
X
H
DATAIN
Write to Memory
LH
DATAOUT
Read Memory
X
H
X
High-Z
Outputs Disabled
4854 tbl 07
Inputs
Outputs
Mode
CE(2)
R/
W
OE
SEM
I/O0-8
HH
L
DATAOUT
Read Semaphore Flag Data Out
H
↑
XL
DATAIN
Write I/O0 into Semaphore Flag
LX
X
L
______
Not Allowed
4854 tbl 08
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