參數(shù)資料
型號(hào)： 7015L35GGB
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： SRAM
英文描述： 8K X 9 DUAL-PORT SRAM, 35 ns, CPGA68
封裝： 1.18 X 1.18 INCH, 0.16 INCH HEIGHT, GREEN, CERAMIC, PGA-68
文件頁(yè)數(shù)： 5/20頁(yè)
文件大?。?/td> 165K
代理商： 7015L35GGB
6.42
IDT7015S/L
High-Speed 8K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
13
APRIL 04, 2006
2954 drw 13
tDW
tAPS
ADDR"A"
tWC
DATAOUT "B"
MATCH
tWP
R/
W"A"
DATAIN "A"
ADDR"B"
tDH
VALID
(1)
MATCH
BUSY"B"
tBDA
VALID
tBDD
tDDD
(3)
tWDD
Timing Waveform of Read with BUSY(2,4,5) (M/S = VIH)
Timing Waveform of Write with BUSY(3)
NOTES:
1. tWH must be met for both
BUSY input (SLAVE) and output (MASTER).
2.
BUSY is asserted on port "B" blocking R/W"B", until BUSY"B" goes HIGH.
3. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from Port "A".
NOTES:
1. To ensure that the earlier of the two ports wins. tAPS is ignored for M/S=VIL
2.
CEL = CER = VIL
3.
OE = VIL for the reading port.
4. If M/
S=VIL (SLAVE), BUSY is an input. Then for this example, BUSY“A”=VIH and BUSY“B” input is shown above.
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from Port "A".
2954 drw 14
R/
W"A"
BUSY"B"
tWP
tWB
R/
W"B"
tWH
(1)
(2)
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7015L35PF 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
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