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參數(shù)資料
| 型號(hào)： | 6P8B |
| 廠商： | NEC Corp. |
| 英文描述： | MOS INTEGRATED CIRCUIT 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION |
| 中文描述： | 馬鞍山集成電路4位單片機(jī)的紅外遙控傳輸 |
| 文件頁數(shù)： | 37/95頁 |
| 文件大?。?/td> | 692K |
| 代理商： | 6P8B |
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37
μ
PD6P8, 6P8A, 6P8B
Data Sheet U17848EJ3V0DS
7. RESET
A system reset is effected by the following causes:
When the POC circuit has detected low power-supply voltage
When the operand value is illegal or does not satisfy the precondition when the HALT instruction is executed
When the accumulator is 0H when the RLZ instruction is executed
When stack pointer overflows or underflows
Table 7-1. Hardware Statuses After Reset
Hardware
Reset by On-Chip POC Circuit During Operation
Reset by Other Factors
Note 1
Reset by the On-Chip POC Circuit During
Standby Mode
PC (11 bits)
000H
SP (1 bit)
0B
Data
R0 = DP
000H
memory
R1 to RF
Undefined
Accumulator (A)
Undefined
Status flag (F)
0B
Carry flag (CY)
0B
Timer (10 bits)
000H
Port register
P0
FFH
P1
××××
11
×
1B
Note 2
0000
×
000B
Note 3
Control register P3
P4
26H
Notes 1.
The following resets are available.
Reset when executing the HALT instruction (when the operand value is illegal or does not satisfy
the precondition)
Reset when executing the RLZ instruction (when A = 0)
Reset by stack pointer’s overflow or underflow
2.
×
: Refers to the value by the K
I
or S
2
pin status.
In order to prevent malfunction, be sure to input a low level to one or more of pins K
I0
to K
I3
when
POC is released by supply voltage rising (Can be left open. When open, leave the pull-down resistor
connected).
3.
×
: Refers to the value based on a decrease of power supply voltage (0 when V
DD
≤
V
ID
).
Remark
V
ID
: RAM retention detection voltage
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