參數(shù)資料
型號： 6P8B
廠商： NEC Corp.
英文描述： MOS INTEGRATED CIRCUIT 4-BIT SINGLE-CHIP MICROCONTROLLER FOR INFRARED REMOTE CONTROL TRANSMISSION
中文描述： 馬鞍山集成電路4位單片機(jī)的紅外遙控傳輸
文件頁數(shù)： 14/95頁
文件大?。?/td> 692K
代理商： 6P8B
14
μ
PD6P8, 6P8A, 6P8B
Data Sheet U17848EJ3V0DS
3. INTERNAL CPU FUNCTIONS
3.1 Program Counter (PC): 11 Bits
The program counter (PC) is a binary counter that holds the address information of the program memory.
Figure 3-1. Program Counter Configuration
The PC contains the address of the instruction that should be executed next. Normally, the counter contents
are automatically incremented in accordance with the instruction length (byte count) each time an instruction is
executed.
However, when executing jump instructions (JMP, JC, JNC, JF, JNF), the PC contains the jump destination
address written in the operand.
When executing the subroutine call instruction (CALL), the call destination address written in the operand is
entered in the PC after the PC contents at the time are saved in the address stack register (ASR). If the return
instruction (RET) is executed after the CALL instruction is executed, the address saved in the ASR is restored to
the PC.
After reset, the value of the PC becomes “000H”.
3.2 Stack Pointer (SP): 1 Bit
This is a 1-bit register that holds the status of the address stack register.
The stack pointer contents are incremented when the call instruction (CALL) is executed and decremented when
the return instruction (RET) is executed.
When reset, the stack pointer contents are cleared to 0.
When the stack pointer overflows (stack level 2 or more) or underflows, the CPU is defined as hung up, a system
reset signal is generated, and the PC becomes 000H.
As no instruction is available to set a value directly for the stack pointer, it is not possible to operate the pointer
by means of a program.
3.3 Address Stack Register (ASR (RF)): 11 Bits
The address stack register saves the return address of the program after a subroutine call instruction is executed.
The lower 8 bits are allocated in RF of the data memory as a alternate-function RAM. The register holds the
ASR value even after the RET instruction is executed.
After reset, it holds the previous data (undefined when turning on the power).
Caution If RF is accessed as the data memory, the higher 4 bits become undefined.
Figure 3-2. Address Stack Register Configuration
PC9
PC10
PC0
PC8
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC
ASR10
ASR9
ASR8
ASR7
ASR6
ASR5
ASR4
ASR3
ASR2
ASR1
ASR0
ASR
RF
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