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Rabbit 3000 Microprocessor User’s Manual
B.1.10 Expanded I/O Memory Addressing
In the Rabbit 3000, only the lower 8 bits of an I/O address were decoded. To provide room
for new peripherals, this was expanded to 16 bits. To ensure backwards compatibility, the
processor always comes up in 8-bit I/O address mode; the 16-bit I/O address mode needs
to be enabled in the MMIDR register by setting bit 7 to 1. Bit 7 was always written with a
zero in the original Rabbit 3000 chip.
B.1.11 External I/O Improvements
Three new features have been added to the external I/O strobes: the ability to invert the
strobe signal, the ability to shorten a read strobe by one clock, and the ability to direct a
strobe to either the alternate I/O bus (if enabled) or the memory bus.
B.1.12 Short Chip Select Timing for Writes
The Rabbit 3000 provided the ability to produce shorter chip select strobes for reads when
in a reduced-speed mode. A new feature has been added via bits 1:0 to produce short chip
select strobes for writes as well, and can be controlled by the GPCSR register.
B.1.12.1 Clock Select and Power Save Modes
Table B-9 outlines the power save modes available in the Rabbit 3000A. The GCSR is
Table B-8. Global Control/Status Register
Global Control/Status Register
(GCSR)
(Address = 0x0000)
Bit(s)
Value
Description
7:6
(Read-only)
00
No reset or watchdog timer time-out since the last read.
01
The watchdog timer timed out. These bits are cleared by a read of this
register.
10
This bit combination is not possible.
11
Reset occurred. These bits are cleared by a read of this register.
5
0
No effect on the periodic interrupt. This bit will always be read as zero.
1
Force a periodic interrupt to be pending.
4:2
xxx
See table below for decode of this field.
1:0
00
Periodic interrupts are disabled.
01
Periodic interrupts use Interrupt Priority 1.
10
Periodic interrupts use Interrupt Priority 2.
11
Periodic interrupts use Interrupt Priority 3.