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參數(shù)資料
| 型號： | 5962R9684502VXA |
| 元件分類： | SRAM |
| 英文描述： | 4K X 9 DUAL-PORT SRAM, 45 ns, PGA68 |
| 封裝： | PGA-68 |
| 文件頁數(shù)： | 8/21頁 |
| 文件大?。?/td> | 496K |
| 代理商： | 5962R9684502VXA |
16
DATA RETENTION CHARACTERISTICS (Pre-Radiation)
(TC = 25°C)
Notes:
1. CE equals VDR, all other inputs equal VDR or VSS.
2. Guaranteed but not tested.
SYMBOL
PARAMETER
MINIMUM
MAXIMUM
VDD @
2.5V
UNIT
VDR
VDD for data retention
2.5
--
V
IDDR
1
Data retention current
--
400
A
t
EFR
1,2
Chip deselect to data retention time
0
ns
tR
1,2
Operation recovery time
tWC or tRC
ns
VDD
CE
DATA RETENTION MODE
t
R
4.5V
VDR 2.5V
Figure 6. Low VDD Data Retention Waveform
t
EFR
V
DR
VIN < 1.5V CMOS
Notes:
1. 50pF including scope probe and test socket.
2. Measurement of data output occurs at the low to high or high to low transition mid-point
(CMOS input = VDD/2).
90%
Figure 7. AC Test Loads and Input Waveforms
Input Pulses
10%
< 5ns
460 ohms
VDD/2
50pF
CMOS
0.5V
VDD-0.5V
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