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參數(shù)資料
| 型號： | 5962-9957701NXD |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 4-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO32 |
| 封裝： | GREEN, PLASTIC, TSSOP-32 |
| 文件頁數(shù)： | 10/43頁 |
| 文件大?。?/td> | 426K |
| 代理商： | 5962-9957701NXD |
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THS1206
SLAS217H – MAY 1999 – REVISED JULY 2003#
www.ti.com
18
CONTINUOUS CONVERSION MODE
The internal clock oscillator used in the single-conversion mode is switched off in continuous conversion mode. In
continuous conversion mode, (bit 1 of control register 0 set to 0) the ADC operates with a free running external clock signal
CONV_CLK. With every rising edge of the CONV_CLK signal a new converted value is written into the FIFO.
Figure 25 shows the timing of continuous conversion mode when one analog input channel is selected. The maximum
throughput rate is 6 MSPS in this mode. The timing of the DATA_AV signal is shown here in the case of a trigger level set
to 1 or 4.
Sample N
Channel 1
Sample N+1
Channel 1
Sample N+2
Channel 1
Sample N+3
Channel 1
Sample N+4
Channel 1
Sample N+5
Channel 1
Sample N+6
Channel 1
Sample N+7
Channel 1
Sample N+8
Channel 1
Data N–5
Channel 1
Data N–4
Channel 1
Data N–3
Channel 1
Data N–2
Channel 1
Data N–1
Channel 1
Data N
Channel 1
Data N+1
Channel 1
Data N+2
Channel 1
Data N+3
Channel 1
td(A)
tw(CONV_CLKH)
tw(CONV_CLKL)
tc
td(O)
td(DATA_AV)
AIN
CONV_CLK
Data Into
FIFO
DATA_AV,
Trigger Level = 1
DATA_AV,
Trigger Level = 4
td(pipe)
50%
Figure 25. Timing of Continuous Conversion Mode (1-channel operation)
Figure 26 shows the timing of continuous conversion mode when two analog input channels are selected. The maximum
throughput rate per channel is 3 MSPS in this mode. The data flow in the bottom of the figure shows the order the converted
data is written into the FIFO. The timing of the DATA_AV signal shown here is for a trigger level set to 2 or 4.
AIN
CONV_CLK
Data Into
FIFO
DATA_AV,
Trigger Level = 2
DATA_AV,
Trigger Level = 4
Data N–3
Channel 2
Data N–2
Channel 1
Data N–2
Channel 2
Data N–1
Channel 1
Data N–1
Channel 2
Data N
Channel 1
Data N
Channel 2
Data N+1
Channel 1
Data N+1
Channel 2
td(DATA_AV)
tw(CONV_CLKH)
tw(CONV_CLKL)
td(A)
Sample N
Channel 1,2
Sample N+1
Channel 1,2
Sample N+2
Channel 1,2
Sample N+3
Channel 1,2
Sample N+4
Channel 1,2
tc
td(O)
td(Pipe)
td(DATA_AV)
50%
Figure 26. Timing of Continuous Conversion Mode (2-channel operation)
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 5962-9958101QXC | 功能描述:LVDS 接口集成電路 RoHS:否 制造商:Texas Instruments 激勵器數(shù)量:4 接收機數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| 5962-9958301Q2A | 制造商:Texas Instruments 功能描述:DC DC Cntrlr Single-OUT PWM DC to DC Controller 3.6V to 40V Input 20-Pin LCCC Tube |
| 5962-9958301QPA | 制造商:Texas Instruments 功能描述:DC DC Cntrlr Single-OUT PWM DC to DC Controller 3.6V to 40V Input 8-Pin CDIP Tube |
| 5962-9958302Q2A | 制造商:Texas Instruments 功能描述:DC DC Cntrlr Single-OUT PWM DC to DC Controller 3.6V to 40V Input 20-Pin LCCC Tube |
| 5962-9958302QPA | 制造商:Texas Instruments 功能描述:DC DC Cntrlr Single-OUT PWM DC to DC Controller 3.6V to 40V Input 8-Pin CDIP Tube |
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