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參數(shù)資料
| 型號： | 5962-9318001MRX |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 多路復用及模擬開關 |
| 英文描述： | QUAD 1-CHANNEL, SGL POLE DOUBLE THROW SWITCH, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁數(shù)： | 6/19頁 |
| 文件大小： | 3138K |
| 代理商： | 5962-9318001MRX |
14
Maxim Integrated
Differential Input DirectDrive
Line Drivers/Headphone Amplifiers
MAX97220A–MAX97220E
Applications Information
MAX9722 Compatibility
The MAX97220_ is compatible with the footprint of the
MAX9722. BIAS on the MAX97220_ is in the same posi-
tion as SVSS. On the MAX9722, SVSS is connected to
PVSS. For the MAX97220_, there is only one charge-
pump output that doubles as the amplifier’s negative
power-supply input. The connection of negative charge-
pump output and amplifier negative power-supply input
is internal on the MAX97220_ and external on the
MAX9722.
To implement a PCB that is compatible with both the MAX9722
and MAX97220_, put a capacitor pad from BIAS/SVSS
(MAX97220_/MAX9722 pin 11) to PGND. Also, place a 0I
resistor pad from BIAS/SVSS (MAX97220_/MAX9722 pin
11) to PVSS (pin 5 on both parts). Install the 0I resistor
when the MAX9722 is used and leave the resistor out of
circuit when the MAX97220_ is used (Figure 4).
Power Dissipation
While driving a headphone load, the IC dissipates a sig-
nificant amount of power. The maximum power dissipa-
tion is given in the Continuous Power Dissipation of the
Absolute Maximum Ratings section or can be calculated
by the following equation:
J(MAX)
A
D(MAX)
JA
TT
P
=
q
where TJ(MAX) is +150NC, TA is the ambient temperature,
and BJA is the reciprocal of the derating factor in NC/W
as specified in the Absolute Maximum Ratings section.
Since the IC is a stereo amplifier, the total maximum
internal power dissipation for a given VDD and load is
given by the following equation:
2
DD
D(MAX)
2 L
4V
P
R
=
π
If the internal power dissipation for a given application
exceeds the maximum allowed for a given package,
reduce power dissipation by decreasing supply voltage,
ambient temperature, input signal, or gain, or by increasing
load impedance.
The TQFN package features an exposed thermal pad
on its underside. This pad lowers the package's thermal
impedance by providing a direct heat conduction path
from the die to the PCB. Connect the exposed thermal
pad to PGND or an isolated plane.
Figure 4. MAX97220A vs. MAX9722 PCB Layout
0.47F
10kI
SHDN
-INR
+INR
+INL
-INL
OUTL
BIAS
C1P
CHARGE
PUMP
C1N
PVSS
C1
1F
OPEN
0.1F
C2
1F
OUTR
SGND PGND
PVDD SVDD
1F
2.5V TO 5.5V
MAX97220A
0.47F
10kI
SHDN
-INR
+INR
+INL
-INL
OUTL
SVSS
C1P
CHARGE
PUMP
C1N
PVSS
C1
1F
0I
1F
OUTR
SGND PGND
PVDD SVDD
1F
2.5V TO 5.5V
MAX9722
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