- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄67335 > 5962-9169401MCA (NATIONAL SEMICONDUCTOR CORP) 1 CHANNEL, VIDEO AMPLIFIER, CDIP14 PDF資料下載
參數(shù)資料
| 型號： | 5962-9169401MCA |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 1 CHANNEL, VIDEO AMPLIFIER, CDIP14 |
| 封裝： | CERDIP-14 |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 509K |
| 代理商： | 5962-9169401MCA |
Application Information (Continued)
the model should predict the equivalent output noise above
the flicker noise region to within a few dB of actual perfor-
mance over the normal range of A
VMAX and component
values.
Calculating CLC520 output noise in a typical circuit
To calculate the noise in a CLC520 application, the noise
terms given for the amplifier as well as the noise terms of the
external components must be included. To clarify the tech-
niques used, output noise in a typical circuit will be calcu-
lated. (
The noise model is depicted in
Figure 7. The diagram as-
sumes spot noise source with V
rms/
and Amps
rms/
units. The Thevenin equivalent of the source and input ter-
mination is used; 25
in series with a noise voltage source.
R
g is assumed noiseless since its effect is included in en.
The internal 5k
resistor at the CLC520 core output is also
assumed noiseless since its effect is included in i
io, The
noise contribution from R
f is modeled as a noise source.
The easiest way to analyze the output noise of this circuit is
to divide the noise power into three pieces; input buffer
noise calculation, output buffer noise and core noise. The
input buffer varies with the gain. The output buffer term is
constant. The core noise term is zero at both maximum and
minimum gain and reaches peak at A
VMAX/2.
Since we assume all noise terms are uncorrelated, the
equivalent input noise voltage squared is given by:
i
i does not contribute to the output buffer noise because the
input buffer inverting input is grounded. e
n is taken from
The equivalent output buffer noise is given by:
i
no does not contribute to the output buffer noise because the
output buffer non-inverting input is grounded.
The core noise is already output referred and is 37nV/
at V
g =1.1 (AVMAX/2) and approaches zero as A goes to 0 or
A
VMAX Summing the noise power for each term gives the
total output noise power.
The total output noise voltage is given by:
Where A
V is the input to output voltage gain, which varies
with V
g.
C accounts for the variation in core noise contribution as V
g
is adjusted. C=1 when gain A
V is AVMAX/2. C is zero at
A
VMAX and AV = 0 and varies between 0 and 1 for all other
values.
Using these equations, total calculated output noise for the
circuit was 20nV/
at minimum gain, 49nV/
at
mid-gain, and 53nV/
at maximum gain.
AGC circuits
Figure 8 shows a typical AGC circuit. The CLC520 is fol-
lowed up with a CLC401 for higher overall gain. The output
of the CLC401 is rectified and fed to an inverting integrator
using a CLC420 (wideband voltage feedback op amp).
When the output voltage, V
OUT, is too large the integrator
output voltage ramps down reducing the net gain of the
CLC520 and V
OUT. If the output voltage is too small, the
integrator ramps up increasing the net gain and the output
voltage. Actual output level is set with R1. To prevent shifts in
DC output voltage with DC changes in input signal level, trim
pot R2 is provided. AGC circuits are always limited in the
range of input signals over which constant output level can
be maintained. In this circuit, we would expect that reason-
able AGC action could be maintained over the gain adjust-
ment range of the CLC520 (at least 40dB). In practice,
rectifier dynamic range limits reduce this slightly.
Evaluation Board
Evaluation PC boards (part number 730029 for through-hole
and 730023 for SOIC) for the CLC520 are available.
01275610
FIGURE 6. Typical Circuit
01275611
FIGURE 7. Noise Model for Typical Circuit
01275612
FIGURE 8. Automatic Gain Control (AGC) Loop
CLC520
www.national.com
11
相關PDF資料 |
PDF描述 |
|---|---|
| 5962-9203101M2A | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CQCC20 |
| 5962-9203101MEA | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP16 |
| 5962-9203103Q2A | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CQCC20 |
| 5962-9203103QEA | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP16 |
| 5962-9203102MEA | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP16 |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 5962-9169701MMA | 制造商:e2v Aerospace & Defense 功能描述:SMD MKD 87C51RC-16 PHI-JLCC |
| 5962-9169701MUA | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Intel 功能描述: |
| 5962-9169702MUA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 5962-9172201MEA | 制造商:e2v 功能描述:Counter Single 4-Bit Binary UP 16-Pin CDIP 制造商:e2v technologies 功能描述:Counter Single 4-Bit Binary UP 16-Pin CDIP |
| 59629172201MFA | 制造商:Texas Instruments 功能描述:5962-9172201MFA |
發(fā)布緊急采購，3分鐘左右您將得到回復。